Equalizer and semiconductor device

Abstract

The present invention provides an equalizer and a semiconductor device, that can suppress a decrease in S/N ratio of a reception signal, can facilitate a disconnection test by a direct current signal, and are excellent in reproducibility of a transmission signal. A low-pass filter receives a reception signal supplied from a reception end to output a signal obtained by removing a high frequency component from the reception signal. A subtraction unit subtracts an output signal from the low-pass filter from the reception signal. An addition unit adds the reception signal from the reception end to an output signal from the subtraction unit. Thus, an output signal from the addition unit has a frequency characteristic of emphasizing the high frequency component. Then, an amplifier amplifies the output signal from the addition unit to transmit it to an output end.

1 . An equalizer comprising:
 a low-pass filter for receiving a reception signal;   a subtraction unit for subtracting from said reception signal an output signal from said low-pass filter;   an addition unit for adding said reception signal to an output signal from said subtraction unit; and   an amplifier for amplifying an output signal from said addition unit,   wherein said low-pass filter includes,   a receiving node receiving said reception signal,   an output node outputting said output signal,   a first transistor coupled between said receiving node and said output node, and   a second transistor having a gate connected to said output node, a source being supplied a ground potential, and a drain being supplied said ground potential.   
     
     
         2 . The equalizer according to  claim 1 , further comprising:
 a first signal conversion unit for converting the output signal from said low-pass filter into a signal in direct proportion to the output signal from said low-pass filter to output the converted signal to said subtraction unit; and   a second signal conversion unit for converting said reception signal into a signal in direct proportion to the reception signal to output the converted signal to said subtraction unit and said addition unit, wherein   an input/output gain of each of said first and second signal conversion units is constant in a frequency band of a signal component contained in said reception signal.   
     
     
         3 . The equalizer according to  claim 1 , further comprising:
 a resistor, wherein   one end of said resistor is connected to an input end of said amplifier, and   the other end of said resistor is supplied with a power supply potential.   
     
     
         4 . The equalizer according to  claim 3 , wherein
 a resistance value of said resistor is variable.   
     
     
         5 . The equalizer according to  claim 1 , wherein
 a cutoff frequency of said low-pass filter is variable.   
     
     
         6 . The equalizer according to  claim 1 , further comprising:
 a capacitor having one electrode for receiving said reception signal and the other electrode for receiving a signal inputted into said amplifier.   
     
     
         7 . A semiconductor circuit device comprising:
 a semiconductor substrate on which the equalizer according to  claim 1  is formed; and   a flip chip package containing said semiconductor substrate, wherein   said equalizer does not include an inductor element.