Semiconductor device

Abstract

A semiconductor device including: a semiconductor member having thereon a plurality of interconnect pads: and a mounting member having a plurality of electrode terminals electrically and mechanically connected to the respective interconnect pads for mounting the semiconductor chip on the mounting member, the electrode terminals forming a plurality of I/O cells each having part of the electrode terminals, the part of electrode terminals including signal terminals, the I/O cells forming a first group of the I/O cells and a second group of I/O cells disposed on an inner position of the mounting member with respect to the first group. The higher integration of the semiconductor device having the higher performances can be realized because the interconnect lines can be drawn to the outer periphery of the chip from the interconnect pads corresponding to each of the I/O cells when the chip is miniaturized or the number of the ball electrodes is increased.

1 . A semiconductor device comprising:
 a semiconductor member having thereon a plurality of electrode terminals; and   a mounting member having a plurality of interconnect pads electrically and mechanically connected to the respective electrode terminals for mounting the semiconductor member on the mounting member, the electrode terminals forming a plurality of I/O cells each having part of the electrode terminals, the part of electrode terminals including signal terminals, the I/O cells including a first group of I/O cells and a second group of I/O cells disposed on an inner position of the mounting member with respect to the first group of I/O cells, wherein said first group of I/O cells include a plurality of rows of electrode terminals arranged to surround a center of the semiconductor member, and said second group of I/O cells include a plurality of rows of electrode terminals arranged provided to surround the center of the semiconductor member.   
   
   
       2 . The semiconductor device as defined in  claim 1 , wherein the semiconductor member is a semiconductor chip, the electrode terminals are internal electrodes disposed on a bottom surface of the semiconductor chip, and the mounting member is a package substrate used for packaging thereon the semiconductor chip. 
   
   
       3 . The semiconductor device as defined in  claim 1 , wherein the semiconductor member is a semiconductor package mounting a semiconductor chip on a packaging substrate, the electrode terminals are ball electrodes disposed on a bottom surface of the packaging substrate, and the mounting member is a mounting substrate for forming a specified circuit by mounting the semiconductor package thereon. 
   
   
       4 . The semiconductor device as defined in  claim 1 , wherein the I/O cell includes only the electrode terminals for signals or the electrode terminals for signals, power and ground intermingled among one another. 
   
   
       5 . The semiconductor device as defined in  claim 4 , wherein the I/O cell includes peripherals. 
   
   
       6 . The semiconductor device as defined in  claim 1 , wherein an interconnect line is connected to the interconnect pad, and the interconnect lines connected to the electrode terminals of the at least one of the I/O cells are formed in a single interconnect layer. 
   
   
       7 . The semiconductor device as defined in  claim 6 , wherein the mounting member includes the interconnect pad and the interconnect line electrically connected to the interconnect pad in the single interconnect layer formed on the surface of the mounting member. 
   
   
       8 . The semiconductor device as defined in  claim 7 , wherein the interconnect lines connected to the first group of I/O cells located on inner positions extend between the second group of I/O cells located on the outer periphery. 
   
   
       9 . The semiconductor device as defined in  claim 6 , wherein the interconnect pads and the interconnect lines electrically connected to the interconnect pads are formed as a multi-layered interconnect layer in the mounting member. 
   
   
       10 . The semiconductor device as defined in  claim 9 , wherein at least one of the first group and the second group includes an outer group and an inner group disposed on the inner position of the semiconductor member with respect to the outer group. 
   
   
       11 . The semiconductor device as defined in  claim 10 , wherein the interconnect lines connected to the interconnect pads corresponding to the first group of I/O cells and the interconnect lines connected to the interconnect pads corresponding to the second group of I/O cells are formed in different interconnect layers.