Fuse circuit and layout designing method thereof

Abstract

A fuse circuit for sensing a fuse connected state and layout designing method thereof are disclosed. Embodiments include a fuse program control unit providing a fuse open voltage in response to a program signal, a fuse cell unit configured to use a contact resistor connecting a node supplied with the fuse open voltage and a node supplied with a fuse connection voltage as a fuse, the fuse cell unit outputting a state information of the contact resistor in response to the fuse open voltage, and a fuse sensing unit outputting a fuse data signal corresponding to the state information of the contact resistor in response to a read signal. Accordingly, embodiments reduce a layout size of the fuse circuit.

1 . An apparatus comprising:
 a fuse program control unit configured to provide a fuse open voltage in response to a program signal;   a fuse cell unit configured to use a contact resistor connecting a node supplied with the fuse open voltage and a node supplied with a fuse connection voltage as a fuse, the fuse cell unit outputting state information of the contact resistor in response to the fuse open voltage; and   a fuse sensing unit configured to output a fuse data signal corresponding to the state information of the contact resistor in response to a read signal.   
     
     
         2 . The apparatus of  claim 1 , wherein if the fuse open voltage is supplied by the fuse program control unit, the fuse cell unit is floated. 
     
     
         3 . The apparatus of  claim 2 , wherein if the fuse open voltage is not supplied by the fuse program control unit, the fuse cell unit provides the fuse connection voltage to the fuse sensing unit. 
     
     
         4 . The apparatus of  claim 2 , wherein the contact resistor is formed of a material melted if the fuse open voltage is applied. 
     
     
         5 . The apparatus of  claim 3 , wherein the fuse sensing unit outputs the fuse data signal corresponding to a logic level state of one of the fuse open voltage and the fuse connection voltage in response to the read signal. 
     
     
         6 . The apparatus of  claim 1 , wherein the fuse open voltage corresponds to a voltage having a level at least equal to a power source voltage and wherein the fuse connection voltage corresponds to a ground voltage. 
     
     
         7 . An apparatus comprising:
 a fuse program control unit configured to provide a fuse open voltage in response to a program signal;   a fuse cell unit configured to use a via resistor connecting a node supplied with the fuse open voltage and a node supplied with a fuse connection voltage as a fuse, the fuse cell unit outputting state information of the via resistor in response to the fuse open voltage; and   a fuse sensing unit configured to output a fuse data signal corresponding to the state information of the via resistor in response to a read signal.   
     
     
         8 . The apparatus of  claim 7 , wherein if the fuse open voltage is supplied by the fuse program control unit, the fuse cell unit is floated. 
     
     
         9 . The apparatus of  claim 8 , wherein if the fuse open voltage is not supplied by the fuse program control unit, the fuse cell unit provides the fuse connection voltage to the fuse sensing unit. 
     
     
         10 . The apparatus of  claim 8 , wherein the via resistor is formed of a material melted if the fuse open voltage is applied. 
     
     
         11 . The apparatus of  claim 9 , wherein the fuse sensing unit outputs the fuse data signal corresponding to a logic level state of one of the fuse open voltage and the fuse connection voltage in response to the read signal. 
     
     
         12 . The apparatus of  claim 8 , wherein the fuse open voltage corresponds to a voltage having a level at least as great as a power source voltage and wherein the fuse connection voltage corresponds to a ground voltage. 
     
     
         13 . A method comprising:
 forming an active region in a semiconductor;   forming a first line for supplying a fuse open voltage and a second line for supplying a fuse connection voltage on the active region;   forming a first contact as a fuse between the active region and the first line; and   forming a second contact between the active region and the second line,   wherein information for sensing a state of the fuse is outputted through the first line.   
     
     
         14 . The method of  claim 13 , wherein the contact resistor is formed of a material melted if the fuse open voltage is applied to the first line. 
     
     
         15 . The method of  claim 13 , wherein the active region is a p type active region formed in a p type well. 
     
     
         16 . The method of  claim 13 , wherein the fuse open voltage corresponds to a voltage having a level equal to or greater than a power source voltage and wherein the fuse connection voltage corresponds to a ground voltage. 
     
     
         17 . A method comprising:
 forming a first line for supplying a fuse open voltage and a second line for supplying a fuse connection voltage in a semiconductor device; and   forming a via as a fuse between the first line and the second line,   wherein information for sensing a state of the fuse is outputted through the first line.   
     
     
         18 . The method of  claim 17 , wherein the via is formed of a material melted if the fuse open voltage is applied to the first line. 
     
     
         19 . The layout method of  claim 17 , wherein the fuse open voltage corresponds to a voltage having a level at least as great as a power source voltage. 
     
     
         20 . The layout method of  claim 17 , wherein the fuse connection voltage corresponds to a ground voltage.