Multi-color cmos pixel sensor with shared row wiring and dual output lines
Abstract
An array of multicolor CMOS pixel sensors has a plurality of photosensors per pixel, each photosensor coupled to a single sense node through a select transistor having a select input, each pixel sensor including a reset transistor coupled to the sense node and having a reset input, an amplifier coupled to the sense node and a row-select transistor coupled to the amplifier. The select inputs and the reset inputs for pixel sensors in a pair of adjacent rows are coupled to select signal lines and reset signal lines associated with the pair of rows. The amplifier transistors in individual columns of each row are coupled to a column output line through a row-select transistor having a row-select input. The row-select inputs for pixel sensors in each row of the array are coupled to a row-select line associated with the row.
Claims
exact text as granted — not AI-modified1 . An array of CMOS pixel sensors, each pixel sensor associated with a row and a column of the array and having a plurality of photosensors per pixel location, each photosensor coupled to a sense node through a select transistor having a select input, each pixel sensor including a reset transistor coupled to the sense node and having a reset input, an amplifier coupled to the sense node and a row-select transistor coupled to the amplifier, wherein:
the select inputs for pixel sensors in a pair of adjacent rows are coupled to select signal lines associated with the pair of rows; the reset inputs for pixel sensors in the pair of adjacent rows are coupled to reset signal lines associated with the pair of rows; the amplifier transistors in individual columns of pixel sensors in odd rows are coupled to a first column line through an odd row-select transistor having an odd row-select input and the amplifiers in the individual columns of pixel sensors in even rows are coupled to a second column line through an even row-select transistor having an even row-select input; and the odd and even row-select inputs for pixel sensors in the pair of adjacent rows are coupled to a row-select line associated with the pair of rows.
2 . The array of claim 1 wherein the color-select signal lines, the reset signal lines and the row-select lines run in the row direction of the array and the column output lines run in the column direction of the array.
3 . The array of claim 2 wherein the amplifier in each pixel sensor is a source-follower transistor having its drain coupled to a source-follower drain potential node, the source-follower drain potential node for each pixel sensor in the array coupled to a source-follower drain potential line associated with a column and running in the column direction of the array.
4 . The array of claim 2 wherein the amplifier in each pixel sensor is a source-follower transistor having its drain coupled to a source-follower drain potential node, the source-follower drain potential node for each pixel sensor in a row in the array and is coupled to a source-follower drain potential line associated with that row and running in the row direction of the array.
5 . An array of CMOS pixel sensors, each pixel sensor associated with a row and a column of the array and having a plurality of photosensors per pixel location, each photosensor coupled to a single sense node through a select transistor having a select input, each pixel sensor including a reset transistor coupled to the sense node and having a reset input, an amplifier transistor coupled to the sense node and a row-select transistor coupled to the amplifier, wherein:
the select inputs for a first group of pixel sensors in a row n of the array and a corresponding group of pixel sensors a row n+1 of the array are coupled to select signal lines associated with rows n and n+1 of the array; the select inputs for a second group of pixel sensors in a row n of the array and a corresponding group of pixel sensors a row n−1 of the array are coupled to select signal lines associated with rows n and n−1 of the array; the reset inputs for pixel sensors in each row is coupled to reset signal lines associated with that row; the amplifier transistors in individual columns of each row are coupled to a column output line through a row-select transistor having a row-select input; and the row-select inputs for pixel sensors in each row of the array are coupled to a row-select line associated with the row.
6 . The array of claim 5 wherein:
the first group of pixel sensors in row n of the array and the corresponding group of pixel sensors row n+1 of the array includes at least one blue pixel sensor and a green pixel sensor; and the second group of pixel sensors in row n of the array and the corresponding group of pixel sensors row n−1 of the array includes at least one blue pixel sensor and a red pixel sensor.
7 . The array of claim 5 wherein:
the first group of pixel sensors in row n of the array and the corresponding group of pixel sensors row n+1 of the array includes first and second blue pixel sensors and a green pixel sensor; and the second group of pixel sensors in row n of the array and the corresponding group of pixel sensors row n−1 of the array includes third and fourth blue pixel sensors and a red pixel sensor.Join the waitlist — get patent alerts
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