Apparatus and method for combined micro-scale and nano-scale c-v, q-v, and i-v testing of semiconductor materials

Abstract

Current Voltage and Capacitance Voltage (IV and CV) measurements are critical in measurement of properties of electronic materials especially semiconductors. A semiconductor testing device to accomplish IV and CV measurement supports a semiconductor wafer and provides a probe for contacting a surface on the wafer under control of an atomic Force Microscope or similar probing device for positioning the probe to a desired measurement point on the wafer surface. Detection of contact by the probe on the surface is accomplished and test voltage is supplied to the semiconductor wafer. A first circuit for measuring capacitance sensed by the probe based on the test voltage and a complimentary circuit for measuring Fowler Nordheim current sensed by the probe based on the test voltage are employed with the probe allowing the calculation of characteristics of the semiconductor wafer based on the measured capacitance and Fowler Nordheim current.

1 . A semiconductor testing device comprising:
 means for supporting a semiconductor wafer;   a probe for contacting a surface on the wafer;   means for positioning the probe to a desired measurement point on the wafer surface;   means for detecting contact by the probe on the surface;   means for supplying test voltage to the semiconductor wafer;   means for measuring capacitance sensed by the probe based on the test voltage;   means for measuring Fowler Nordheim current: sensed by the probe based on the test voltage; and,   means for calculating characteristics of the semiconductor wafer based on the measured capacitance and Fowler Nordheim current.   
   
   
       2 . A semiconductor testing device as defined in  claim 1  wherein the probe comprises:
 a conductive core;   a coaxial shield having an insulating layer surrounding the conductive core and a conductive layer surrounding the insulating layer and an insulating sheath covering the conductive shield;   an exposed tip of the conductive core extending beyond the coaxial shield to establish contact with the surface of the wafer.   
   
   
       3 . A semiconductor testing device as defined in  claim 2  wherein the conductive core is tungsten. 
   
   
       4 . A semiconductor testing device as defined in  claim 2  wherein the conductive core is Iridium. 
   
   
       5 . A semiconductor testing device as defined in  claim 2  in which the exposed tip has a diameter of about 0.005 inch. 
   
   
       6 . A semiconductor testing device as defined in  claim 2  wherein the means for measuring capacitance includes a dielectric resonator having a central resonator electrically connected to the probe tip through a transmission line. 
   
   
       7 . A semiconductor testing device as defined in  claim 6  wherein the dielectric resonator wherein the resonator and transmission line are surrounded by an RF return. 
   
   
       8 . A semiconductor testing device as defined in  claim 7  wherein the dielectric resonator incorporates a cladding shield. 
   
   
       9 . A semiconductor testing, device as defined in  claim 8  wherein the dielectric resonator is a 1 GHz 1/λ resonator, 
   
   
       10 . A semiconductor testing device as defined in  claim 9  wherein a drive pad and signal pickup are cut into the cladding. 
   
   
       11 . A semiconductor testing device as defined in  claim 10  where a VCO trace is coupled to the resonator line through the drive pad to measure amplitude. 
   
   
       12 . A semiconductor testing device as defined in  claim 9  wherein the central resonator and shield conductors are shorted together and comprise the same DC potential and are directly connected to the probe to provide an element of the means for measuring Fowler Nordheim current through use as an IV signal trace. 
   
   
       13 . A semiconductor testing device as defined in  claim 1  wherein the means for positioning the probe comprises a probe controller. 
   
   
       14 . A semiconductor testing device as defined in  claim 13  wherein the probe controller comprises an atomic force microscope (AFM). 
   
   
       15 . A semiconductor testing device as defined in  claim 7  wherein the means for positioning further comprises a translation stage incorporating a test plate on which the wafer is mounted. 
   
   
       16 . A semiconductor testing device as defined in  claim 1  wherein the probe includes a cantilever support and the contact sensing means comprises a capacitive sensor monitoring flexure of the cantilever support. 
   
   
       17 . A semiconductor testing device as defined in  claim 1  wherein the probe includes a cantilever support and the contact sensing means comprises an optical lever. 
   
   
       18 . A semiconductor testing device as defined in  claim 1  wherein the contact sensing means comprises;
 means for monitoring the capacitance measuring means during operation of the positioning means to bring the probe into contact, with the surface; and   means for detecting a discontinuity in measured capacitance.   
   
   
       19 . A probe system for testing of a semiconductor wafer comprising:
 a probe for contacting a surface on the wafer;   means connected to the probe for measuring capacitance sensed by the probe based on a test voltage applied to the wafer;   means connected to the probe for measuring Fowler Nordheim current sensed by the probe based on the test voltage.   
   
   
       20 . A probe system as defined in  claim 19  wherein the current measuring means comprises:
 a fly lead connected to the probe for signal transmission;   a voltage biased amplifier in parallel with a sensing resistor connected to the fly lead through an isolating inductor providing an output voltage and   means for calculation of the current based on the bias voltage and sensing resistor.   
   
   
       21 . A probe system as defined in  claim 20  wherein the capacitance measuring means comprises:
 a detector inductively coupled to sense transmission signals through the fly lead;   a diode connected to the detector to supply a signal through a filter for capacitance output.   
   
   
       22 . A probe system as defined in  claim 21  further comprising an RF drive circuit having a voltage controlled oscillator driving an RF amplifier connected through a capacitor to an inductive coupling to the fly lead. 
   
   
       23 . A probe system as defined in  claim 21  further comprising a dielectric resonator connected to the fly lead. 
   
   
       24 . A semiconductor testing device as defined in  claim 1  wherein the means for measuring Fowler Nordheim current comprises:
 a fly lead connected to the probe for signal transmission;   a voltage biased amplifier in parallel with a sensing resistor connected to the fly lead through an insulating inductor providing an output voltage and   means for calculation of the current based on the bias voltage and sensing resistor.   
   
   
       25 . A semiconductor testing device as defined in  claim 24  wherein the means for measuring capacitance includes:
 a detector inductively coupled to sense transmission signals through the fly lead;   a diode connected to the detector to supply a signal through a filter for capacitance output.   
   
   
       26 . A semiconductor testing device as defined in  claim 25  wherein the means for supply test voltage comprises an RF drive circuit having a voltage controlled oscillator driving an RF amplifier connected through a capacitor to an inductive coupling to the fly lead. 
   
   
       27 . A method for testing of semiconductor wafers comprising the steps of:
 placing a probe in contact with a test surface of a semiconductor wafer;   applying a test voltage to the semiconductor wafer;   measuring capacitance and substantially simultaneously measuring Fowler Nordheim current sensed by the probe in response to the applied test voltage;   calculating oxide thickness of the wafer employing uncorrected measured capacitance data for Vfb in conjunction with measured FN current; and   correcting capacitance data based on the calculated oxide thickness.   
   
   
       28 . A method as defined in  claim 27  wherein the step of calculating oxide thickness is conducted using the formula
     T   ox   =ln ( I /( V+V   fb )) 2   /C   fn (1 /V ).   
   
   
       29 . A method as defined in  claim 27  wherein the step of calculating oxide thickness includes determining the slope of the curve In(I/(V+Vfb)) vs 1/N, 
   
   
       30 . A method as defined in  claim 27  wherein correcting of the capacitance data comprises the steps of:
 calculating effective contact area of the probe based on the calculated oxide thickness;   calculating a corrected Cmax based on the effective contact area;   correcting the capacitance vs. voltage data based on the corrected Cmax.