Carrier used in the manufacture of substrate and method of manufacturing substrate using the carrier
Abstract
The invention relates to a carrier used in the manufacture of a substrate and a method of manufacturing a substrate using the carrier, the method including (A) preparing a carrier comprising a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; (B) patterning the metal layers to form base circuit layers; (C) forming buildup layers on the base circuit layers; (D) executing a routing process to separate the insulating layers from the releasing layer; and (E) forming solder-resist layers on the buildup layers and forming openings in-the solder-resist layers and the insulating layers to expose pads.
Claims
exact text as granted — not AI-modified1 . A carrier used in the manufacture of a substrate, comprising:
a releasing layer; insulating layers disposed on both sides of the releasing layer; and metal layers disposed on the insulating layers.
2 . The carrier according to claim 1 , wherein the releasing layer has a smaller length than that of the insulating layers such that the insulating layers are in contact with each other at lateral regions thereof.
3 . The carrier according to claim 1 , wherein the releasing layer includes first and second releasing layers, and which further comprises a reinforcing layer disposed between the first and second releasing layers.
4 . The carrier according to claim 3 , wherein the reinforcing layer comprises a double-sided copper clad laminate or a reinforcing and insulating material.
5 . A method of manufacturing a substrate using a carrier, comprising:
preparing a carrier comprising a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; patterning the metal layers to form base circuit layers; forming buildup layers on the base circuit layers; executing a routing process to separate the insulating layers from the releasing layer; and forming solder resist layers on the buildup layers and forming openings in the solder resist layers and the insulating layers to expose pads.
6 . The method according to claim 5 , wherein, in preparing the carrier, the releasing layer has a smaller length than that of the insulating layers such that the insulating layers are in contact with each other at lateral regions thereof.
7 . The method according to claim 5 , wherein, in preparing the carrier, the releasing layer includes first and second releasing layers, and the carrier further comprises a reinforcing layer disposed between the first and second releasing layers.
8 . The method according to claim 7 , wherein the reinforcing layer comprises a double-sided copper clad laminate or a reinforcing and insulating material.
9 . The method according to claim 6 , wherein, in executing the routing process, the routing process is executed along routing lines positioned inside the lateral regions at which the insulating layers are in contact with each other so as to separate the insulating layers from the releasing layer.Join the waitlist — get patent alerts
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