Method for manufacturing semiconductor package

Abstract

Provided is a method for manufacturing a semiconductor package. The method includes providing a first substrate having a first top surface on which a chip pad is formed and a first bottom surface opposite to the first top surface. The method additionally includes removing a portion of the first top surface to form a sawing groove, and forming a conductive pattern on the first substrate. Also, the method includes removing a portion of the first bottom surface to divide the first substrate into a plurality of semiconductor chips having a redistribution pattern formed of a portion of the conductive pattern, and mounting a selected one of the plurality of semiconductor chips on a second substrate having a second top surface on which a lead is formed. The method further includes forming an interconnector electrically connecting the lead to the redistribution pattern.

1 . A method for manufacturing a semiconductor package, the method comprising:
 providing a first substrate having a first top surface on which a chip pad is formed and a first bottom surface opposite to the first top surface;   removing a portion of the first top surface to form a sawing groove;   forming a conductive pattern on the first substrate;   removing a portion of the first bottom surface to divide the first substrate into a plurality of semiconductor chips having a redistribution pattern formed of a portion of the conductive pattern;   mounting a selected one of the plurality of semiconductor chips on a second substrate having a second top surface on which a lead is formed, and a second bottom surface opposite to the second top surface; and   forming an interconnector electrically connecting the lead to the redistribution pattern in order to electrically connect the selected semiconductor chip to the second substrate.   
   
   
       2 . The method of  claim 1 , wherein dividing the first substrate into the plurality of semiconductor chips comprises:
 removing the portion of the first bottom surface so that a bottom surface of the sawing groove is removed;   wherein each of the semiconductor chips has an active surface on which the chip pad is formed, a back surface opposite to the active surface, and lateral surfaces; and   wherein the redistribution pattern includes a horizontal portion and a vertical portion, the horizontal portion formed on the active surface of the semiconductor chips and electrically connected to the chip pad, the vertical portion formed on the lateral surface of the semiconductor chips and extending from the horizontal portion.   
   
   
       3 . The method of  claim 2 , wherein mounting the selected semiconductor chip comprises disposing an adhesive between the back surface of the selected semiconductor chip and the second top surface of the second substrate to attach the selected semiconductor chip to the top surface of the second substrate. 
   
   
       4 . The method of  claim 2 , wherein electrically connecting the selected semiconductor chip to the second substrate comprises forming one of a solder bump and a stud bump between the vertical portion of the redistribution pattern and the lead. 
   
   
       5 . The method of  claim 2 , wherein electrically connecting the selected semiconductor chip to the second substrate comprises fusing the vertical portion of the redistribution pattern and the lead. 
   
   
       6 . The method of  claim 5 , wherein fusing the vertical portion of the redistribution pattern and the lead uses one of heat, a laser, and ultrasonic waves.