US2010134952A1PendingUtilityA1

Capacitor device and method of manufacturing the same

Assignee: SHINKO ELECTRIC IND COPriority: Oct 27, 2004Filed: Jan 21, 2010Published: Jun 3, 2010
Est. expiryOct 27, 2024(expired)· nominal 20-yr term from priority
Inventors:Koichi Tanaka
H10W 20/084H10W 20/031H10W 72/00H10W 44/601H10W 20/496H10D 1/68H05K 3/465H05K 2203/1189H05K 3/005H05K 2201/0187H05K 3/4602H05K 2203/0108H05K 2203/0551H05K 3/107H05K 2201/09509H05K 3/4652H05K 1/162H05K 3/0023H10B 12/00
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Claims

Abstract

A method of manufacturing a capacitor device of the present invention, includes the steps of, forming an insulating layer on a substrate, forming a recess portion in the insulating layer by an imprinting process, forming a lower electrode by filling a metal layer in the recess portion in the insulating layer, forming a photosensitive dielectric layer on the lower electrode, forming an upper electrode on the dielectric layer, and forming a dielectric layer pattern under the upper electrode by exposing/developing the dielectric layer while using the upper electrode as a mask.

Claims

exact text as granted — not AI-modified
1 . A capacitor device comprising:
 a substrate;   an insulating layer formed on the substrate;   a recess portion formed in the insulating layer;   a lower electrode formed to be buried in the recess portion in the insulating layer;   a dielectric layer pattern formed on the lower electrode;   an upper electrode formed on the dielectric layer pattern.   
     
     
         2 . A capacitor device comprising:
 a substrate;   a lower electrode formed over the substrate;   an insulating layer formed on the lower electrode;   an opening portion formed in a portion of the insulating layer on the lower electrode;   a dielectric layer pattern formed to be buried in the opening portion of the insulating layer;   an upper electrode formed on the dielectric layer pattern.   
     
     
         3 . A capacitor device according to  claim 1 , wherein an upper surface of the lower electrode and an upper surface of the insulating layer constitute a coplanar surface. 
     
     
         4 . A capacitor device according to  claim 2 , wherein an upper surface of the dielectric layer pattern and an upper surface of the insulating layer constitute a coplanar surface.

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