US2010127404A1PendingUtilityA1

Semiconductor device

Assignee: NEC ELECTRONICS CORPPriority: Aug 12, 2005Filed: Jan 19, 2010Published: May 27, 2010
Est. expiryAug 12, 2025(expired)· nominal 20-yr term from priority
Inventors:Akira Furuya
H10W 20/076H10P 50/283
45
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Claims

Abstract

In a method for manufacturing a semiconductor device, insulation resistance of the porous film is stabilized, and leakage current between adjacent interconnects provides an improved reliability in signal propagation therethrough. The method includes: sequentially forming over a semiconductor substrate a porous film and a patterned resist film; forming a concave exposed surface of the substrate; forming a non-porous film covering the interior wall of the concave portion and the porous film; selectively removing the non-porous film from the bottom of the concave portion and the non-porous film by anisotropic etch; forming a barrier metal film covering the porous film and the interior wall; and forming a metallic film on the barrier metal film to fill the concave portion. The anisotropic etch process uses an etching gas with mixing ratio MR, 45≦MR≦100, where MR=((gaseous “nitrogen” containing compound)+(inert gas))/(gaseous “fluorine” containing compound).

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, comprising:
 a semiconductor substrate;   a porous film formed on said semiconductor substrate;   a concave portion formed in said porous film and exposed surface of said   
       semiconductor substrate containing a semiconductor element to that bottom;
 a non-porous film, covering a side wall of said concave portion and also covering an interior wall of a pore in said porous film exposed in said concave portion; 
 a barrier metal film, covering the surface of said non-porous film in said concave portion and covering the surface of said semiconductor substrate exposed in the bottom of said concave portion; and 
 a metallic film formed on said barrier metal film and filling the interior of said concave portion, 
 wherein density of methyl group in the surface of said non-porous film covering the side wall of said concave portion is lower than density of methyl group in the surface of said non-porous film covering an interior wall of said pore in said porous film exposed in said concave portion. 
 
     
     
         2 . The semiconductor device according to claim I, wherein a porosity of said porous film is within a range equal to or more than 10% and equal to or less than 60%. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein a mean pore diameter of said porous film is within a range equal to or more than 0.1 nm and equal to or less than 5 nm. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein said porous film is a thin film of methyl silsesquioxane. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein density of methyl group in the surface of said no-porous film covering the side wall of said concave portion is 25% or more lower than density of methyl group in the surface of said non-porous film covering an interior wall of said pore in said porous film exposed in said concave portion. 
     
     
         6 . The semiconductor device according to  claim 1 , further comprising an etching stopper on said semiconductor substrate, wherein said etching stopper contacts said barrier metal film.

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