Chip package and manufacturing method thereof

Abstract

A chip package including a plurality of conductive bodies and a shielding layer for better electromagnetic interferences shielding is provided. The shielding layer over the molding compound contacts with the conductive bodies disposed on the substrate, and the shielding layer and the conductive bodies function as EMI shield. The shielding layer is electrically grounded through the conductive bodies connected to the laminate substrate and the ground plane of the substrate.

1 . A chip package, comprising:
 a laminate substrate;   at least a chip disposed on the laminate substrate;   a plurality of conductive bodies disposed on the laminate substrate and around the chip;   a molding compound, at least encapsulating the chip, a portion of the laminate substrate and the plurality of the conductive bodies; and   a shielding layer, disposed over the molding compound, covering the molding compound and partially covering at least a top surface of each conductive body exposed by the molding compound.   
   
   
       2 . The chip package as claimed in  claim 1 , wherein at least a sidewall of each conductive body is exposed and is aligned with an edge of the shielding layer. 
   
   
       3 . The chip package as claimed in  claim 1 , wherein sidewalls of the conductive bodies are covered by the molding compound and an edge of the molding compound is aligned with an edge of the shielding layer. 
   
   
       4 . The chip package as claimed in  claim 1 , wherein the chip is electrically connected to the contacts through a plurality of bumps arranged underneath the chip. 
   
   
       5 . The chip package as claimed in  claim 1 , wherein the conductive bodies are arranged around the chip as a ring, and the chip is separated from the conductive bodies. 
   
   
       6 . The chip package as claimed in  claim 1 , wherein the chip is a radio frequency chip. 
   
   
       7 . The chip package as claimed in  claim 1 , wherein the shielding layer is electrically connected to the laminate substrate via the conductive body and at least a ground via of the laminate substrate. 
   
   
       8 . The chip package as claimed in  claim 1 , wherein the conductive body is made of a solder material and the conductive body is a solder block. 
   
   
       9 . The chip package as claimed in  claim 1 , wherein the conductive body is a part of a printed circuit board. 
   
   
       10 . The chip package as claimed in  claim 1 , wherein the conductive body is a part of a leadframe. 
   
   
       11 . The chip package as claimed in  claim 1 , wherein a material of the shielding layer is a metal material. 
   
   
       12 . A manufacturing method of a chip package, comprising:
 providing a matrix substrate having a plurality of substrate units, wherein each substrate unit is defined by a plurality of sawing lines and has a die attaching region thereon;   forming a plurality of conductive bodies on each substrate unit and arranged around the die attaching region;   disposing at least a chip on the die attaching region of the substrate unit, wherein the chip is electrically connected to the substrate unit, and the plurality of conductive bodies is separated from the chip;   forming a molding compound over the matrix substrate to encapsulate the chip, portions of the substrate units and the conductive bodies;   performing a marking process to remove a portion of the molding compound until a top surface of each conductive body is exposed;   forming a shielding layer over the molding compound to cover the molding compound and the exposed top surface of each conductive body; and   performing a singulation process to obtain a plurality of chip packages.   
   
   
       13 . The method as claimed in  claim 12 , wherein the conductive bodies are arranged on sawing lines of the matrix substrate and on boundary lines of each substrate unit. 
   
   
       14 . The method as claimed in  claim 12 , wherein the conductive bodies are arranged around boundary lines of each substrate unit with a distance apart. 
   
   
       15 . The method as claimed in  claim 12 , wherein the conductive bodies are formed from a metallic material by a spraying process, a sputtering process or a plating process. 
   
   
       16 . The method as claimed in  claim 12 , wherein the conductive bodies are formed from a solder material by a spraying process or a printing process. 
   
   
       17 . The method as claimed in  claim 12 , wherein the marking process comprises a laser digging process or a laser drilling process. 
   
   
       18 . The method as claimed in  claim 12 , wherein the chip is electrically connected to the substrate through flip chip bonding.