US2010105174A1PendingUtilityA1

Semiconductor device

49
Assignee: RENESAS TECH CORPPriority: Apr 27, 2007Filed: Jan 5, 2010Published: Apr 29, 2010
Est. expiryApr 27, 2027(~0.7 yrs left)· nominal 20-yr term from priority
Inventors:Kuniharu MutoToshiyuki HataHiroshi SatoHiroi OkaOsamu Ikeda
H10W 90/766H10W 90/756H10W 90/736H10W 74/00H10W 72/07653H10W 72/07652H10W 72/07633H10W 72/07554H10W 72/07553H10W 72/07552H10W 72/07535H10W 72/07533H10W 72/07337H10W 72/07336H10W 72/5524H10W 72/5522H10W 72/5475H10W 72/5438H10W 72/5363H10W 72/952H10W 72/926H10W 72/923H10W 72/884H10W 72/871H10W 72/853H10W 72/652H10W 72/627H10W 72/537H10W 72/536H10W 72/534H10W 72/527H10W 72/353H10W 72/352H10W 72/325H10W 72/59H10W 46/607H10W 46/401H10W 46/103H10W 46/00H10W 72/0711H10W 72/016H10W 70/481H10W 70/466H10W 70/424H10W 70/411H10W 70/60H10W 70/457H10W 72/00H10D 64/256H10D 64/62H10D 62/105H10D 62/83H10D 30/668H10D 30/665H10D 12/481H10D 64/2527
49
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Claims

Abstract

To actualize a reduction in the on-resistance of a small surface mounted package having a power MOSFET sealed therein. A silicon chip is mounted on a die pad portion integrated with leads configuring a drain lead. The silicon chip has, on the main surface thereof, a source pad and a gate pad. The backside of the silicon chip configures a drain of a power MOSFET and bonded to the upper surface of a die pad portion via an Ag paste. A lead configuring a source lead is electrically coupled to the source pad via an Al ribbon, while a lead configuring a gate lead is electrically coupled to the gate pad via an Au wire.

Claims

exact text as granted — not AI-modified
1 - 19 . (canceled) 
     
     
         20 . A method of manufacturing a semiconductor device, comprising the steps of:
 (a) providing a lead frame including a chip mounting portion and a first lead, the chip mounting portion being separated from the first lead electrically;   (b) mounting a semiconductor chip over the chip mounting portion, the semiconductor chip having a main surface and a back surface opposite to the main surface, and a first pad being disposed on the main surface;   (c) connecting the first pad of the semiconductor chip and the first lead of the lead frame with a first metal ribbon electrically using a bonding tool,   wherein in the step (c), the first metal ribbon is bonded to the first pad of the semiconductor chip and to the first lead of the lead frame by adding ultrasonic waves to the bonding tool, and   wherein the first metal ribbon is bonded to the first pad of the semiconductor chip and to the first lead of the lead frame such that a size of a first connecting portion of the first metal ribbon and the first pad of the semiconductor chip and a size of a second connecting portion of the first metal ribbon and the first lead of the lead frame are the same.   
     
     
         21 . A method of manufacturing a semiconductor device according to  claim 20 ,
 wherein in the step (c), a third connecting portion of the first metal ribbon and the first pad of the semiconductor chip is further formed over the first pad of the semiconductor chip.   
     
     
         22 . A method of manufacturing a semiconductor device according to  claim 21 ,
 wherein a size of the third connecting portion and the size of the first connecting portion are the same.   
     
     
         23 . A method of manufacturing a semiconductor device according to  claim 21 ,
 wherein in the step (c), the third connecting portion is formed such that a part of the first metal ribbon between the first and third connecting portions is higher than the first and third connecting portions.   
     
     
         24 . A method of manufacturing a semiconductor device according to  claim 21 ,
 wherein in the step (c), the third connecting portion is formed such that a apart of the first metal ribbon between the first and third connecting portions has a gibbous shape.   
     
     
         25 . A method of manufacturing a semiconductor device according to  claim 20 ,
 wherein after the step (c), a second metal ribbon is bonded to the first pad of the semiconductor chip and to the first lead of the lead frame by adding ultrasonic waves to the bonding tool.   
     
     
         26 . A method of manufacturing a semiconductor device according to  claim 20 ,
 wherein a width of the first metal ribbon and a width of the second metal ribbon are the same.   
     
     
         27 . A method of manufacturing a semiconductor device according to  claim 20 ,
 wherein the first metal ribbon is an Al ribbon.   
     
     
         28 . a method of manufacturing a semiconductor device according to  claim 20 ,
 wherein the semiconductor chip further has a second pad,   wherein the lead frame further has a second lead, the second lead being separated from the chip mounting portion electrically, and   wherein before or after the step (c), a wire is bonded to the second pad of the semiconductor chip and to the second lead of the lead frame.   
     
     
         29 . A method of manufacturing a semiconductor device according to  claim 20 ,
 wherein the wire is an Au wire.   
     
     
         30 . A method of manufacturing a semiconductor device according to  claim 20 ,
 wherein the semiconductor chip further has a second pad,   wherein the lead frame further has a second lead, the second lead being separated from the chip mounting portion electrically, and   wherein before or after the step (c), a third metal ribbon is bonded to the second pad of the semiconductor chip and to the second lead of the lead frame.   
     
     
         31 . A method of manufacturing a semiconductor device according to  claim 20 ,
 wherein a width of the first metal ribbon and a width of the third metal ribbon are the same.   
     
     
         32 . A method of manufacturing a semiconductor device according to  claim 20 , further comprising the steps of:
 (d) sealing the semiconductor chip, a part of the first lead, a part of the chip mounting portion, and the first metal ribbon with a molding resin;   (e) cutting another part of the first lead exposed outside of the molding resin from the lead frame; and   (f) forming the first lead into a gull-wing shape.   
     
     
         33 . A method of manufacturing a semiconductor device according to  claim 32 .
 wherein in the step (d), the chip mounting portion is sealed with the molding resin such that a back surface of the chip mounting portion is exposed from the molding resin.   
     
     
         34 . A method of manufacturing a semiconductor device according to  claim 20 ,
 wherein the semiconductor chip is a power MOSFET, and   wherein the first pad of the semiconductor chip is a source pad.   
     
     
         35 . A method of manufacturing a semiconductor device according to  claim 28 ,
 wherein the second pad of the semiconductor chip is a gate pad.   
     
     
         36 . A method of manufacturing a semiconductor device according to  claim 35 ,
 wherein the source pad has a wider area than the gate pad.   
     
     
         37 . A method of manufacturing a semiconductor device according to  claim 35 ,
 wherein a back surface of the semiconductor chip is a drain of the power MOSFET.   
     
     
         38 . A method of manufacturing a semiconductor device according to  claim 37 ,
 wherein the back surface of the semiconductor chip is attached over the chip mounting portion using an Ag paste or a Pb free solder.

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