Nonvolatile semiconductor memory and method of fabrication thereof
Abstract
A method of fabricating a semiconductor memory having word lines and bit lines disposed on a semiconductor substrate, with memory cells being formed at intersecting portions of the word lines and the bit lines. The method includes forming a first insulating film on the semiconductor substrate, forming a first polysilicon film on the first insulating film, patterning the first polysilicon film to form floating gates of the memory cells and an etching stop layer covering and surrounding contact portions of the word lines in a plan view, forming a second insulating film on the first polysilicon film, forming a conductive film on the second insulating film, patterning the conductive film to form control gates of the memory cells and strip-shaped regions as the word lines, accumulating an interlayer insulating film on the conductive film, and etching the interlayer insulating film, and opening contact holes for the contact portions.
Claims
exact text as granted — not AI-modified1 . A method of fabricating a nonvolatile semiconductor memory having a plurality of word lines and a plurality of bit lines intersecting the word lines, and memory cells at intersecting portions of the word lines and the bit lines, the method comprising:
providing a semiconductor substrate having a first insulating film thereon and a polysilicon film on the first insulating film; patterning the polysilicon film to form floating gates of the memory cells and an etching stop layer; forming a second insulating film on the polysilicon film; forming a conductive film on the second insulating film; patterning the conductive film to form control gates of the memory cells and strip-shaped regions as the word lines, the word lines having a plurality of contact portions covered and surrounded by the etching stop layer in a plan view; accumulating an interlayer insulating film on the conductive film; and etching the interlayer insulating film, and opening contact holes for the contact portions above the conductive film.
2 . The method of fabricating a nonvolatile semiconductor memory of claim 1 , wherein
the etching stop layer includes a plurality of rectangular regions, and each rectangular region covers and surrounds a respective one of the contact portions, each side of the rectangular region being separated by a predetermined distance from the corresponding contact portion in the plan view.
3 . The method of fabricating a nonvolatile semiconductor memory of claim 1 , wherein the polysilicon film has a thickness of 500 Å.
4 . The method of fabricating a nonvolatile semiconductor memory of claim 1 , further comprising forming the polysilicon film by low-pressure chemical vapor deposition (LPCVD).
5 . The method of fabricating a nonvolatile semiconductor memory of claim 1 , further comprising introducing phosphorus (P) or arsenic (As) into the polysilicon film in a concentration of 2E20 [1/cm 3 ] by ion injection or vapor phase diffusion.
6 . The method of fabricating a nonvolatile semiconductor memory of claim 1 , wherein the conductive film is a further polysilicon film having a thickness of 1000 Å.
7 . The method of fabricating a nonvolatile semiconductor memory of claim 6 , further comprising forming the further polysilicon film by low-pressure chemical vapor deposition (LPCVD).
8 . The method of fabricating a nonvolatile semiconductor memory of claim 6 , further comprising introducing phosphorus (P) or arsenic (As) into the further polysilicon film in a concentration of 4E20 [1/cm 3 ] by ion injection or vapor phase diffusion.Join the waitlist — get patent alerts
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