Method for treating semiconductor processing components and components formed thereby

Abstract

A semiconductor processing component can include SiC, wherein the semiconductor processing component has an impurity ratio less than 34:1. The impurity ratio can be a ratio of a first average impurity concentration to a second impurity level, wherein the first average impurity concentration is an average impurity concentration of a impurity from an exposed surface of the semiconductor processing component to a depth of 0.2 microns from the exposed surface, and the second average impurity concentration is an average impurity concentration of the impurity from a depth of 0.8 microns from the exposed surface to a depth of 1.0 micron from the exposed surface.

1 . A semiconductor processing component comprising SiC, wherein the semiconductor processing component has an impurity ratio less than 34:1, wherein:
 the impurity ratio is a ratio of a first average impurity concentration to a second impurity level,   the first average impurity concentration is an average impurity concentration of a impurity from an exposed surface of the semiconductor processing component to a depth of 0.2 microns from the exposed surface; and   the second average impurity concentration is an average impurity concentration of the impurity from a depth of 0.8 microns from the exposed surface to a depth of 1.0 micron from the exposed surface.   
     
     
         2 . The semiconductor processing component of  claim 1 , wherein the impurity ratio is at least approximately 1.0:1. 
     
     
         3 . The semiconductor processing component of  claim 1 , wherein the impurity ratio is less than 4.0:1. 
     
     
         4 . The semiconductor processing component of  claim 1 , wherein the impurity ratio is in a range of approximately 1.0:1 to approximately 4.0:1. 
     
     
         5 . The semiconductor processing component of  claim 1 , wherein the outer surface portion comprises CVD-SiC. 
     
     
         6 . The semiconductor processing component of  claim 5 , wherein the outer surface portion is a CVD-SiC layer deposited over a substrate. 
     
     
         7 . The semiconductor processing component of  claim 6 , wherein the substrate comprises SiC. 
     
     
         8 . The semiconductor processing component of  claim 7 , wherein the substrate comprises SiC impregnated with elemental silicon. 
     
     
         9 . The semiconductor processing component of  claim 8 , wherein the substrate comprises recrystallized SiC impregnated with elemental silicon. 
     
     
         10 . The semiconductor processing component of  claim 8 , wherein the CVD-SiC layer has a thickness within a range of about 10 to about 1000 μm. 
     
     
         11 . The semiconductor processing component of  claim 8 , wherein the CVD-SiC layer has a thickness within a range of about 10 to about 800 μm. 
     
     
         12 . The semiconductor processing component of  claim 7 , wherein the component is a free-standing CVD-SiC component. 
     
     
         13 . The semiconductor processing component of  claim 12 , wherein the outer surface consists essentially of CVD-SiC. 
     
     
         14 . The semiconductor processing component of  claim 1 , wherein the impurity is Cr, Fe, Cu, Ni Al, Ca, Na, Zn, Ti, or any combination thereof. 
     
     
         15 . The semiconductor processing component of  claim 14 , wherein the impurity is Cr or Fe. 
     
     
         16 . The semiconductor processing component of  claim 15 , wherein the impurity is Fe. 
     
     
         17 . The semiconductor processing component of  claim 1 , wherein the semiconductor processing component comprises a component from the group consisting of semiconductor wafer paddles, process tubes, wafer boats, liners, pedestals, long boats, cantilever rods, wafer carriers, process chambers, dummy wafers, wafer susceptors, focus rings, suspension rings. 
     
     
         18 . The semiconductor processing component of  claim 17 , wherein the component is a wafer boat. 
     
     
         19 . The semiconductor processing component of  claim 1 , wherein the component is machined prior to treatment to provide said surface impurity level.