Inter-frame texel cache

Abstract

Methods, apparatuses, and systems are presented for caching. A cache memory area may be used for storing data from memory locations in an original memory area. The cache memory area may be used in conjunction with a repeatedly updated record of storage associated with the cache memory area. The repeatedly updated record of storage can thus provide a history of data storage associated with the cache memory area. The cache memory area may be loaded with entries previously stored in the cache memory area, by utilizing the repeatedly updated record of storage. In this manner, the record may be used to “warm up” the cache memory area, loading it with data entries that were previously cached and may be likely to be accessed again if repetition of memory accesses exists in the span of history captured by the repeatedly updated record of storage.

1 . A method for caching data comprising:
 providing a cache memory area for storing data from memory locations in an original memory area;   maintaining a repeatedly updated record of storage associated with the cache memory area;   loading the cache memory area with entries previously stored in the cache memory area by utilizing the repeatedly updated record of storage; and   accessing the cache memory area to obtain data corresponding to memory locations in the original memory area.   
     
     
         2 . The method of  claim 1  wherein the repeatedly updated record of storage comprises a sequence of first memory allocations, each of the first memory allocations capable of storing a plurality of entries each comprising a tag for referencing a memory location in the original memory area;
 wherein the cache memory area comprises a sequence of second memory allocations corresponding to a limited range of the sequence of first memory locations, each of the second memory allocations capable of storing a plurality of entries each comprising a data value associated with a memory location in the original memory area; and   wherein loading of the cache memory area comprises advancing the limited range to which the second sequence of memory allocations corresponds, by unloading data from one of the second memory allocations and loading one of the second memory allocations with data corresponding to entries stored in a subsequent one of the sequence of first memory allocations.   
     
     
         3 . The method of  claim 2  wherein the sequence of second memory allocations is implemented as on-chip memory within a semiconductor chip containing a system requesting access to a memory location in the original memory area, wherein the sequence of first memory allocations is implemented as off-chip memory that is not part of the semiconductor chip containing the system requesting access to the memory location in the original memory area. 
     
     
         4 . The method of  claim 3  wherein the system requesting access is a graphics processing unit requesting access to texel data stored in the original memory area. 
     
     
         5 . The method of  claim 2  wherein each of the plurality of entries stored in each of the first memory allocations comprises both a tag for referencing a memory location in the original memory area and a corresponding data value associated with the memory location. 
     
     
         6 . The method of  claim 2  wherein each of the first memory allocations is dynamically selected to store either entries each comprising a tag for referencing a memory location in the original memory area or entries each comprising both a tag for referencing a memory location in the original memory area and a corresponding data value associated with the memory location. 
     
     
         7 . The method of  claim 2  wherein each of the plurality of entries stored in each of the second memory allocations further comprises a tag for referencing a memory location in the original memory area. 
     
     
         8 . The method of  claim 2  wherein the accessing step comprises reading entries in at least one of the second memory allocations. 
     
     
         9 . The method of  claim 2  wherein the accessing step comprises replacing entries in at least one of the second memory allocations. 
     
     
         10 . The method of  claim 2  wherein the step of unloading one of the second memory allocations comprises writing changed entries from the second memory allocation back to associated memory locations in the original memory area.