US2010038707A1PendingUtilityA1
Semiconductor device
Est. expiryJan 20, 2023(expired)· nominal 20-yr term from priority
H10D 62/117H10P 95/00H10D 62/142H10D 62/53H10D 64/64H10D 12/481H10D 12/038H10D 8/60
51
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Claims
Abstract
A semiconductor device including: a semiconductor substrate; a first main electrode provided on a first main surface of said semiconductor substrate; a second main electrode provided on a second main surface of said semiconductor substrate, wherein a main current flows in a thickness direction of said semiconductor substrate; a trench that extends from the first main surface of said semiconductor substrate towards the second main surface; a gate insulating film covering an inner surface of said trench; and a gate electrode buried in said trench and surrounded by said gate insulating film.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
a semiconductor substrate; a first main electrode provided on a first main surface of said semiconductor substrate; a second main electrode provided on a second main surface of said semiconductor substrate, wherein a main current flows in a thickness direction of said semiconductor substrate; a trench that extends from the first main surface of said semiconductor substrate towards the second main surface; a gate insulating film covering an inner surface of said trench; and a gate electrode buried in said trench and surrounded by said gate insulating film, wherein said semiconductor substrate has at least one recess formed in said second main surface and therefore said semiconductor substrate at least has a first region having a first thickness and a second region having a second thickness that is thinner than said first thickness, said second region corresponds to a region where said at least one recess is formed, said second main electrode is provided in said at least one recess, said second main electrode is formed of a material that makes ohmic contact or Schottky contact with said semiconductor substrate, and said second thickness is set at such a thickness as to keep a breakdown voltage of said semiconductor device.
2 . A semiconductor device comprising:
a semiconductor substrate; a first main electrode provided on a first main surface of said semiconductor substrate; a second main electrode provided on a second main surface of said semiconductor substrate, wherein a main current flows in a thickness direction of said semiconductor substrate; a trench that extends from the first main surface of said semiconductor substrate towards the second main surface; a gate insulating film covering an inner surface of said trench; a gate electrode buried in said trench and surrounded by said gate insulating film, wherein said semiconductor substrate has at least one recess formed in said second main surface and therefore said semiconductor substrate at least has a first region having a first thickness and a second region having a second thickness that is thinner than said first thickness, said second region corresponds to a region where said at least one recess is formed, said second main electrode is provided in said at least one recess, and said second thickness is set at such a thickness as to keep a breakdown voltage of said semiconductor device; and a field contact ring provided in said first main surface of said semiconductor substrate, for alleviating an electric field in a peripheral portion of said semiconductor device, wherein said second region is provided in an area surrounded by said field contact ring.
3 . The semiconductor device according to claim 2 ,
wherein said field contact ring is provided in said first main surface of said semiconductor substrate in a portion corresponding to said first region.
4 . A semiconductor device comprising:
a semiconductor substrate; a first main electrode provided on a first main surface of said semiconductor substrate; a second main electrode provided on a second main surface of said semiconductor substrate, wherein a main current flows in a thickness direction of said semiconductor substrate; a trench that extends from the first main surface of said semiconductor substrate towards the second main surface; a gate insulating film covering an inner surface of said trench; a gate electrode buried in said trench and surrounded by said gate insulating film, wherein said semiconductor substrate has at least one recess formed in said second main surface and therefore said semiconductor substrate at least has a first region having a first thickness and a second region having a second thickness that is thinner than said first thickness, said second region corresponds to a region where said at least one recess is formed, said second main electrode is provided in said at least one recess, said second thickness is set at such a thickness as to keep a breakdown voltage of said semiconductor device, and said semiconductor substrate has a first conductivity type; a first semiconductor region having a second conductivity type and provided in the entirety of said first main surface of said semiconductor substrate; a trench formed to extend from said first main surface and pass through said first semiconductor region; a gate insulating film covering an inner surface of said trench; a gate electrode buried in said trench and surrounded by said gate insulating film; a second semiconductor region having said first conductivity type and selectively provided in a surface of said first semiconductor region, a portion of said second semiconductor region being in contact with said gate insulating film; a third semiconductor region having said second conductivity type and provided in a surface of said semiconductor substrate in a portion corresponding to a bottom of said at least one recess; a fourth semiconductor region having the first conductivity type and provided in a surface of said first region on said second main surface side; and a third main electrode in contact with said fourth semiconductor region, and wherein said first main electrode is in contact with said second semiconductor region, and said second main electrode is electrically connected to said third semiconductor region, wherein said at least one recess is filled with a conductor layer, said third semiconductor region is in contact with said conductor layer, and said second main electrode is provided on a surface of said conductor layer.
5 . The semiconductor device according to claim 4 , wherein said second main electrode and said third main electrode are formed as a common main electrode extending over both of a surface of said fourth semiconductor region and the surface of said conductor layer.
6 . The semiconductor device according to claim 4 , further comprising a lifetime control region where carrier lifetime is shortened, said lifetime control region being provided in said first region and closer to said first main surface than said third semiconductor region.Join the waitlist — get patent alerts
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