US2010026543A1PendingUtilityA1

Analog to digital converter

Assignee: ALI CORPPriority: Aug 1, 2008Filed: Jun 19, 2009Published: Feb 4, 2010
Est. expiryAug 1, 2028(~2 yrs left)· nominal 20-yr term from priority
H03M 1/0646H03M 1/361
35
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Claims

Abstract

An analog to digital converter having an input stage amplifier array, an input stage voltage divider array, a comparator array and an encoder. The input stage amplifier array calculates and amplifies the difference between an input signal and a plurality of reference signals to generate a plurality of amplified differences. The input stage voltage divider array averages every two adjacent amplified differences to generate a plurality of average signals. The comparator array compares the average signals with a threshold value and outputs the compared results to the encoder for digital data representing the value of the input signal.

Claims

exact text as granted — not AI-modified
1 . An analog to digital converter, comprising:
 an input stage amplifier array, calculating and amplifying differences between an input signal and a plurality of reference signals to generate a plurality of amplified differences;   an input stage voltage divider array, averaging every two adjacent amplified differences to generate a plurality of average signals;   a comparator array, comparing the average signals with a threshold value to generate a plurality of compared results; and   an encoder, transforming the compared results to digital data to label the value of the input signal.   
   
   
       2 . The analog to digital converter as claimed in  claim 1 , wherein the encoder further comprises:
 an output stage voltage divider array, averaging every two adjacent compared results to generate a plurality of average compared results; and   a latch array, receiving the average compared results and outputting the digital data.   
   
   
       3 . An analog to digital converter, comprising:
 an input stage amplifier array, calculating and amplifying differences between an input signal and a plurality of reference signals to generate a plurality of amplified differences;   an input stage voltage divider array, averaging every two adjacent amplified differences to generate a plurality of average signals;   an intermediate stage amplifier array, amplifying the average signals to generate a plurality of intermediate amplified signals;   an intermediate stage voltage divider array, averaging every two adjacent intermediate amplified signals to generate a plurality of intermediate average signals to be coupled to a comparator array;   the comparator array, comparing the received signals with a threshold value to output a plurality of compared results; and   an encoder, transforming the compared results to digital data to label the value of the input signal.   
   
   
       4 . The analog to digital converter as claimed in  claim 3 , wherein the encoder further comprises:
 an output stage voltage divider array, averaging every two adjacent compared results to generate a plurality of average compared results; and   a latch array, receiving the average compared results and outputting the digital data.   
   
   
       5 . An analog to digital converter, comprising:
 an input stage amplifier array, calculating and amplifying differences between an input signal and a plurality of reference signals to generate a plurality of amplified differences;   an intermediate stage amplifier array, amplifying the amplified differences to generate a plurality of intermediate amplified signals;   an intermediate stage voltage divider array, averaging every two adjacent intermediate amplified signals to generate a plurality of intermediate average signals to be coupled to a comparator array;   the comparator array, comparing the received signals with a threshold value to output a plurality of compared results; and   an encoder, transforming the compared results to digital data to label the value of the input signal.   
   
   
       6 . The analog to digital converter as claimed in  claim 5 , wherein the encoder further comprises:
 an output stage voltage divider array, averaging every two adjacent compared results to generate a plurality of average compared results; and   a latch array, receiving the average compared results and outputting the digital data.

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