US2010025809A1PendingUtilityA1

Integrated Circuit and Method of Forming Sealed Trench Junction Termination

Assignee: TRION TECHNOLOGY INCPriority: Jul 30, 2008Filed: Jul 30, 2008Published: Feb 4, 2010
Est. expiryJul 30, 2028(~2 yrs left)· nominal 20-yr term from priority
H10D 8/00H10D 62/104H10D 18/80H10D 18/00H10D 10/441H10D 10/421H10D 10/051H10D 8/422
48
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Claims

Abstract

An integrated circuit having a substrate with a first conductivity type of semiconductor material. A buried layer is formed in the substrate. The buried layer has a second conductivity type of semiconductor material. A first semiconductor layer is formed over the buried layer. The first semiconductor layer has the second conductivity type of semiconductor material. A trench is formed through the first semiconductor layer and buried layer and extends into the substrate. The trench is lined with an insulating layer and filled with an insulating material. A second semiconductor layer is formed in the first semiconductor layer. The second semiconductor layer has the first conductivity type of semiconductor material. A third semiconductor layer is formed in the second semiconductor layer. The third semiconductor layer has the second conductivity type of semiconductor material. The first, second, and third semiconductor layers form the collector, base, and emitter of a bipolar transistor.

Claims

exact text as granted — not AI-modified
1 . An integrated circuit, comprising:
 a substrate including a first conductivity type of semiconductor material;   a buried layer formed in the substrate, the buried layer having a second conductivity type of semiconductor material opposite the first conductivity type of semiconductor material;   a first semiconductor layer formed over the buried layer, the first semiconductor layer having the second conductivity type of semiconductor material;   a trench formed through the first semiconductor layer and buried layer extending into the substrate, the trench being lined with an insulating layer and filled with an insulating material;   a second semiconductor layer formed in the first semiconductor layer, the second semiconductor layer having the first conductivity type of semiconductor material; and   a third semiconductor layer formed in the second semiconductor layer, the third semiconductor layer having the second conductivity type of semiconductor material.   
   
   
       2 . The integrated circuit of  claim 1 , wherein the first semiconductor layer forms a collector of a transistor, the second semiconductor layer forms a base of the transistor, the third semiconductor layer forms an emitter of the transistor. 
   
   
       3 . The integrated circuit of  claim 1 , further including:
 a first metal layer coupled to the first semiconductor layer;   a second metal layer coupled to the second semiconductor layer; and   a third metal layer coupled to the third semiconductor layer.   
   
   
       4 . The integrated circuit of  claim 1 , wherein the trench has a rounded or polygonal shape. 
   
   
       5 . The integrated circuit of  claim 1 , wherein the trench includes vertical sidewalls. 
   
   
       6 . A method of making an integrated circuit, comprising:
 providing a substrate including a first conductivity type of semiconductor material;   forming a buried layer in the substrate, the buried layer having a second conductivity type of semiconductor material opposite the first conductivity type of semiconductor material;   forming a first semiconductor layer over the buried layer, the first semiconductor layer having the second conductivity type of semiconductor material;   forming a trench through the first semiconductor layer and buried layer extending into the substrate;   depositing an insulating material in the trench;   forming a second semiconductor layer in the first semiconductor layer, the second semiconductor layer having the first conductivity type of semiconductor material; and   forming a third semiconductor layer in the second semiconductor layer, the third semiconductor layer having the second conductivity type of semiconductor material.   
   
   
       7 . The method of  claim 6 , further including lining the trench with an insulating layer. 
   
   
       8 . The method of  claim 6 , wherein the first semiconductor layer forms a collector of a transistor, the second semiconductor layer forms a base of the transistor, the third semiconductor layer forms an emitter of the transistor. 
   
   
       9 . The method of  claim 6 , further including:
 electrically connecting a first metal layer to the first semiconductor layer;   electrically connecting a second metal layer to the second semiconductor layer; and   electrically connecting a third metal layer to the third semiconductor layer.   
   
   
       10 . The method of  claim 6 , wherein the buried layer extends up to a surface of the first semiconductor layer. 
   
   
       11 . The method of  claim 10 , wherein the buried layer operates as a collector of a transistor, the second semiconductor layer operates as a base of the transistor, and the third semiconductor layer operates as an emitter of the transistor. 
   
   
       12 . The method of  claim 10 , further including:
 electrically connecting a first metal layer to the buried layer;   electrically connecting a second metal layer to the second semiconductor layer; and   electrically connecting a third metal layer to the third semiconductor layer.   
   
   
       13 . The method of  claim 6 , wherein the trench has a rounded or polygonal shape. 
   
   
       14 . A method of making an integrated circuit, comprising:
 providing a substrate including a first conductivity type of semiconductor material;   forming a buried layer in the substrate, the buried layer having a second conductivity type of semiconductor material opposite the first conductivity type of semiconductor material;   forming a first semiconductor layer over the buried layer, the first semiconductor layer having the second conductivity type of semiconductor material;   forming a trench through the first semiconductor layer and buried layer extending into the substrate; and   depositing an insulating-material in the trench.   
   
   
       15 . The method of  claim 14 , further including:
 forming a second semiconductor layer in the first semiconductor layer, the second semiconductor layer having the first conductivity type of semiconductor material; and   forming a third semiconductor layer in the second semiconductor layer, the third semiconductor layer having the second conductivity type of semiconductor material.   
   
   
       16 . The method of  claim 15 , wherein the first semiconductor layer forms a collector of a transistor, the second semiconductor layer forms a base of the transistor, the third semiconductor layer forms an emitter of the transistor. 
   
   
       17 . The method of  claim 15 , wherein the buried layer extends up to a surface of the first semiconductor layer. 
   
   
       18 . The method of  claim 17 , wherein the buried layer operates as a collector of a transistor, the second semiconductor layer operates as a base of the transistor, and the third semiconductor layer operates as an emitter of the transistor. 
   
   
       19 . The method of  claim 14 , wherein the trench has a rounded or polygonal shape. 
   
   
       20 . The method of  claim 14 , further including lining the trench with an insulating layer. 
   
   
       21 . A method of making an integrated circuit, comprising:
 providing a substrate;   forming a buried layer in the substrate;   forming a first semiconductor layer over the buried layer;   forming a trench through the first semiconductor layer and buried layer extending into the substrate; and   depositing an insulating material in the trench.   
   
   
       22 . The method of  claim 21 , further including:
 forming a second semiconductor layer in the first semiconductor layer; and   forming a third semiconductor layer in the second semiconductor layer.   
   
   
       23 . The method of  claim 21 , wherein the buried layer extends up to a surface of the first semiconductor layer. 
   
   
       24 . The method of  claim 21 , wherein the trench has a rounded or polygonal shape. 
   
   
       25 . The method of  claim 21 , further including lining the trench with an insulating layer.

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