Managing Integrated Circuit Stress Using Stress Adjustment Trenches

Abstract

Roughly described, methods and systems for improving integrated circuit layouts and fabrication processes in order to better account for stress effects. Dummy features can be added to a layout either in order to improve uniformity, or to relax known undesirable stress, or to introduce known desirable stress. The dummy features can include dummy diffusion regions added to relax stress, and dummy trenches added either to relax or enhance stress. A trench can relax stress by filling it with a stress-neutral material or a tensile strained material. A trench can increase stress by filling it with a compressive strained material. Preferably dummy diffusion regions and stress relaxation trenches are disposed longitudinally to at least the channel regions of N-channel transistors, and transversely to at least the channel regions of both N-channel and P-channel transistors. Preferably stress enhancement trenches are disposed longitudinally to at least the channel regions of P-channel transistors.

1 . An integrated circuit implementing a first integrated circuit design, comprising:
 a first diffusion region for a first transistor;   an STI region adjacent to the first diffusion region; and   a first trench within the STI region, the first trench being filled with a fill material that does not alter the first integrated circuit design.   
   
   
       2 . An integrated circuit according to  claim 1 , wherein the first diffusion region includes a channel region for the first transistor,
 and wherein the first trench is disposed transversely relative to the channel region.   
   
   
       3 . An integrated circuit according to  claim 2 , wherein the fill material comprises a tensile strained material. 
   
   
       4 . An integrated circuit according to  claim 1 , wherein the first transistor is an N-channel transistor, wherein the first diffusion region includes a channel region for the first transistor,
 and wherein the first trench is disposed longitudinally relative to the channel region.   
   
   
       5 . An integrated circuit according to  claim 4 , wherein the fill material comprises a tensile strained material. 
   
   
       6 . An integrated circuit according to  claim 1 , wherein the first transistor is a P-channel transistor, wherein the first diffusion region includes a channel region for the first transistor,
 wherein the first trench is disposed longitudinally relative to the channel region,   and wherein the fill material comprises a compressive strained material.   
   
   
       7 . An integrated circuit according to  claim 1 , wherein the first layout includes a strip region bordered on two opposite sides by respective first and second power supply conductors, the strip region having a long dimension and a short dimension, and the power supply conductors being oriented in the long dimension, the first diffusion region being disposed in the strip region and laterally between the two power supply conductors and spaced from the first power supply conductor by at least part of the STI region,
 and wherein the first trench is oriented in the long dimension and is disposed laterally between the diffusion region and the first power supply conductor.   
   
   
       8 . An integrated circuit according to  claim 7 , wherein the diffusion region is spaced from the second power supply conductor by at least part of a second STI region,
 further comprising a second trench within the STI region, the second trench being laterally between the diffusion region and the second power supply conductor.   
   
   
       9 . An integrated circuit according to  claim 8 , wherein the second trench is filled with a fill material that does not alter the first integrated circuit design,
 and wherein the fill materials in each of the first and second trenches comprise tensile strained material.