US2010001763A1PendingUtilityA1
Semiconductor integrated circuit, layout design method of semiconductor integrated circuit, and layout program product for same
Est. expiryJun 13, 2027(~0.9 yrs left)· nominal 20-yr term from priority
Inventors:Naohiro Kobayashi
G06F 30/392
55
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
A semiconductor integrated circuit includes multiple cells each containing transistors. The transistors include a gate and diffusion layers. The multiple cells are adjacently formed in a first direction perpendicular to the gate. The distance between the cell border and the adjacent and corresponding diffusion layer, the first direction, is the same.
Claims
exact text as granted — not AI-modified1 . A semiconductor integrated circuit, comprising:
a plurality of first cells each including a first circuit and a first transistor having a first gate extending in a first direction and a plurality of first diffusion layers so that said first gate is arranged between said diffusion layers; and a plurality of second cells each including a second circuit different from said first circuit, and a second transistor having a second gate extending in said first direction and a plurality of second diffusion layers, said second gate being arranged between said second diffusions layers, wherein a distance between adjacent diffusion layers of first and second cells adjacently arranged among said first and second cells, in a second direction perpendicular to the first direction, and a distance between adjacent diffusion layers of first cells adjacently arranged among said first and second cells, in said second direction.
2 . The semiconductor integrated circuit according to claim 1 ,
wherein said first circuit comprises an inverter circuit, and said second circuit comprises a NAND circuit.Join the waitlist — get patent alerts
Track US2010001763A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.