CMOS image sensor and method for fabricating the same
Abstract
A CMOS image sensor that includes a semiconductor substrate with a plurality of photodiodes arranged at fixed intervals on the semiconductor substrate. A light-shielding layer partially overlapping the plurality of photodiodes and an insulating interlayer are formed on an entire surface of the semiconductor substrate including the plurality of photodiodes. A color filter layer having a plurality of color filters separated by a predetermined gap is formed on the insulating interlayer and a planarization layer is formed over the entire surface of the semiconductor substrate including the color filter layer. A plurality of microlenses are formed on the planarization layer in correspondence with the color filters of the color filter layer, wherein an additional structural layer, disposed between the color filter layer and the insulating interlayer, is provided to close a predetermined gap between the color filters of the color filter layer.
Claims
exact text as granted — not AI-modified1 . A method for fabricating a CMOS image sensor, comprising:
forming a plurality of photodiodes at fixed intervals in a surface of a semiconductor substrate; forming a light-shielding layer on portions of the semiconductor substrate exposed between the photodiodes; forming an insulating interlayer over an entire surface of the semiconductor substrate including the light shielding layer; forming a color filter layer having a plurality of color filters separated by a predetermined gap on the insulating layer; and forming an additional structural layer having a pattern for blocking light incident to said color filter layer at the predetermined gap on the insulating layer.
2 . The method of claim 1 , said additional structural layer forming step comprising:
coating a black photoresist over the entire surface of the semiconductor substrate including the color filter layer; and selectively patterning the coated black photoresist according to the predetermined gap of the color filter layer.
3 . The method of claim 1 , further comprising:
forming a planarization layer over the entire surface of the semiconductor substrate including the color filter layer; and forming a plurality of microlenses on the planarization layer in correspondence with the color filters of said color filter layer.
4 . The method of claim 3 , further comprising:
irradiating the micro-lenses with ultraviolet light to harden the micro-lenses.
5 . The method of claim 1 , wherein said color filter layer is formed by successive applications of a colored resist for filtering light by wavelength, each colored resist being coated on the structure provided under said color filter layer and being separately patterned to overlap adjacent portions of said additional structural layer.
6 . The method of claim 1 , wherein the insulating interlayer is formed as a multi-layered structure.
7 . The method of claim 1 , wherein said light-shielding layer is selectively patterned by photolithography leaving opaque metal on portions of the semiconductor substrate exposed between the photodiodes.
8 . The method of claim 7 , wherein said light-shielding layer has a pattern corresponding to an arrangement of the photodiodes.
9 . The method of claim 1 , wherein the said additional structural layer is patterned to be arranged between the color filters of said color filter layer.
10 . The method of claim 1 , wherein said additional structural layer is formed of black photoresist patterned according to the predetermined gap of said color filter layer.Join the waitlist — get patent alerts
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