High performance field effect transistors comprising carbon nanotubes fabricated using solution based processing

Abstract

The present invention is directed toward field effect transistors (FETs) and thin film transistors (TFTs) comprising carbon nanotubes (CNTs) and to methods of making such devices using solution-based processing techniques, wherein the CNTs within such devices have been fractionated so as to be concentrated in semiconducting CNTs. Additionally, the relatively low-temperature solution-based processing achievable with the methods of the present invention permit the use of plastics in the fabricated devices.

1 - 15 . (canceled) 
     
     
         16 . A field effect transistor comprising:
 a) a plastic substrate;   b) a gate electrode;   c) a dielectric layer in contact with the gate electrode;   d) a semiconducting active material in contact with the dielectric layer, wherein the semiconducting active material comprises carbon nanotubes, the carbon nanotubes having been non-destructively enriched in semiconducting carbon nanotubes; and   e) source and drain electrodes in contact with the semiconducting active material.   
     
     
         17 . The field effect transistor of  claim 16 , wherein the semiconducting active material further comprises material selected from the group consisting of polymeric material, oligomers, single-stranded DNA, polyethylenimine, C60, aromatic organic molecules, and combinations thereof. 
     
     
         18 . The field effect transistor of  claim 16 , wherein the semiconducting active material further comprises a polymeric material in contact with the carbon nanotubes. 
     
     
         19 . The field effect transistor of  claim 18 , wherein the polymeric material has dendritic material attached to it. 
     
     
         20 . The field effect transistor of  claim 16 , wherein the semiconducting active material further comprises a polythiophene material. 
     
     
         21 . The field effect transistor of  claim 16 , wherein the transistor realizes charge carrier mobility in the semiconductor active region that is between about 10-3 cm2/Vsec and about 105 cm2/Vsec. 
     
     
         22 . The field effect transistor of  claim 16 , wherein the transistor realizes charge carrier mobility in the semiconductor active region that is between about 10-1 cm2/Vsec and about 30 cm2/Vsec. 
     
     
         23 . The field effect transistor of  claim 16 , wherein the carbon nanotubes within the semiconducting active material have a density high enough to achieve a percolation threshold. 
     
     
         24 . The field effect transistor of  claim 16 , wherein the transistor is part of a matrix-addressable array, with each node in the array comprising at least one such transistor. 
     
     
         25 . A field effect transistor comprising:
 a) input and output electrodes; and   b) a semiconducting active material coupled to the input and output electrodes, wherein the semiconducting active material comprises carbon nanotubes, the carbon nanotubes having been non-destructively enriched in semiconducting carbon nanotubes.   
     
     
         26 . The field effect transistor of  claim 25 , wherein the substrate is a polymeric material. 
     
     
         27 . The field effect transistor of  claim 25 , wherein the semiconducting active material further comprises material selected from the group consisting of polymeric material, oligomers, single-stranded DNA, polyethylenimine, C60, aromatic organic molecules, and combinations thereof. 
     
     
         28 . The field effect transistor of  claim 25 , wherein the semiconducting active material further comprises a polythiophene material. 
     
     
         29 . The field effect transistor of  claim 25 , wherein the transistor realizes charge carrier mobility in the semiconductor active region that is between about 10-3 cm2/Vsec and about 105 cm2/Vsec. 
     
     
         30 . The field effect transistor of  claim 25 , wherein the transistor realizes charge carrier mobility in the semiconductor active region that is between about 10-1 cm2/Vsec and about 30 cm2/Vsec. 
     
     
         31 . The field effect transistor of  claim 25 , wherein the carbon nanotubes within the semiconducting active material have a density high enough to achieve a percolation threshold. 
     
     
         32 . The field effect transistor of  claim 25 , wherein the transistor is part of a matrix-addressable array, with each node in the array comprising at least one such transistor. 
     
     
         33 . A field effect transistor comprising:
 a) a plastic substrate;   b) a gate electrode;   c) a dielectric layer in contact with the gate electrode;   d) source and drain electrodes; and   e) a semiconducting active material bridging the source and drain electrodes, the material comprising a nanotube network of semiconducting and metallic carbon nanotubes, wherein the nanotube network has a nanotube density sufficient to achieve percolation threshold and below a level that would short the device.   
     
     
         34 . The field effect transistor of  claim 33 , wherein the semiconducting active material further comprises material selected from the group consisting of polymeric material, oligomers, single-stranded DNA, polyethylenimine, C60, aromatic organic molecules, and combinations thereof. 
     
     
         35 . The field effect transistor of  claim 33 , wherein the semiconducting active material further comprises a polythiophene material. 
     
     
         36 . The field effect transistor of  claim 33 , wherein the transistor realizes charge carrier mobility in the semiconductor active region that is between about 10-3 cm2/Vsec and about 105 cm2/Vsec. 
     
     
         37 . The field effect transistor of  claim 33 , wherein the transistor realizes charge carrier mobility in the semiconductor active region that is between about 10-1 cm2/Vsec and about 30 cm2/Vsec. 
     
     
         38 . The field effect transistor of  claim 33 , wherein the transistor is part of a matrix-addressable array, with each node in the array comprising at least one such transistor.