Semiconductor device

Abstract

In order to realize a higher reliability TFT and a high reliability semiconductor device, an NTFT of the present invention has a channel forming region, n-type first, second, and third impurity regions in a semiconductor layer. The second impurity region is a low concentration impurity region that overlaps a tapered potion of a gate electrode with a gate insulating film interposed therebetween, and the impurity concentration of the second impurity region increases gradually from the channel forming region to the first impurity region. And, the third impurity region is a low concentration impurity region that does not overlap the gate electrode. Moreover, a plurality of NTFTs on the same substrate should have different second impurity region lengths, respectively, according to difference of the operating voltages. That is, when the operating voltage of the second TFT is higher than the operating voltage of the first TFT, the length of the second impurity region is longer on the second TFT than on the first TFT.

1 . A semiconductor device comprising:
 a semiconductor layer formed over a substrate having an insulating surface, the semiconductor layer comprising at least one channel region, source and drain regions, and at least one impurity region located between one of source and drain regions and the channel region; and   a gate electrode formed over the semiconductor layer with a gate insulating film interposed therebetween;   wherein only a portion of the impurity region is overlapped with a portion of the gate electrode, and   wherein the overlapped portion of the gate electrode has a thinner thickness than that of a portion of the gate electrode above the channel region.