Method and Device of Measuring Interface Trap Density in Semiconductor Device

Abstract

A method is provided for measuring interface trap density in a semiconductor device. In the method, measurement parameters are input to a host computer. A pulse condition is set at a pulse generator using the measurement parameters. A pulse of a predetermined frequency generated by the pulse generator is applied to a gate of a transistor, and a charge pumping current is measured from a bulk of the transistor. A charge pumping current measurement may be repeated for a plurality of frequencies while changing the frequency until a set frequency is reached. A pure charge pumping current is calculated for each frequency where a gate tunneling leakage current is removed from the charge pumping current measured for each frequency. Interface trap density is calculated from the calculated pure charge pumping current for each frequency.

1 . A device for measuring interface trap density, the device comprising:
 a pulse generator configured to generate a pulse of a predetermined frequency, wherein the pulse is applied to an object wafer; and   an amperemeter configured to measure a charge pumping current from the object wafer.   
   
   
       2 . The device of  claim 1 , further comprising a host computer configured to receive at least one measurement parameter required for measurement, and wherein the pulse generator is configured to generate the pulse in accordance with the at least one measurement parameter. 
   
   
       3 . The device according to  claim 2 , further comprising a selector which controls the pulse generated at the pulse generator. 
   
   
       4 . The device according to  claim 1 , wherein the wafer has a transistor comprising a gate, a grounded source/drain, and a bulk, and wherein the pulse is applied to the gate and the amperemeter is connected to the bulk. 
   
   
       5 . The device according to  claim 4 , wherein the pulse has a fixed base voltage. 
   
   
       6 . The device according to  claim 4 , the transistor further comprising a gate channel, wherein the gate channel operates between an accumulation state and an inversion state to generate the charge pumping current (I cp ). 
   
   
       7 . The device according to  claim 4 , wherein the pulse generated from the pulse generator comprises a fixed low level gate voltage and an increasing high level gate voltage.