Carrier for double-side polishing apparatus, double-side polishing apparatus using the same, and double-side polishing method

Abstract

The present invention provides a carrier for double-side polishing apparatus which is set between upper and lower turn tables having polishing pads attached thereto and has a holding hole in which a semiconductor wafer sandwiched between the upper and lower turn tables is held at the time of polishing in a double-side polishing apparatus, wherein a material of the carrier is titanium, and surface roughness of the titanium carrier is 0.14 μm or above in terms of Ra. As a result, there can be provided the carrier for double-side polishing apparatus, a double-side polishing apparatus, and a double-side polishing method that can stably and efficiently produce a high-quality wafer having reduced wafer peripheral sag and a high flatness at the time of double-side polishing of a semiconductor wafer.

1 . A carrier for double-side polishing apparatus which is set between upper and lower turn tables having polishing pads attached thereto and has a holding hole in which a semiconductor wafer sandwiched between the upper and lower turn tables is held at the time of polishing in a double-side polishing apparatus, wherein a material of the carrier is titanium, and surface roughness of the titanium carrier is 0.14 μm or above in terms of Ra. 
     
     
         2 . The carrier for double-side polishing apparatus according to  claim 1 , wherein the surface roughness is 0.32 μm or above in terms of Ra. 
     
     
         3 . The carrier for double-side polishing apparatus according to  claim 1 , wherein the carrier has grooves each reaching the holding hole from a carrier outer peripheral side on front and back surfaces thereof. 
     
     
         4 . The carrier for double-side polishing apparatus according to  claim 3 , wherein a pattern of the grooves is a grid-like pattern or a radial pattern. 
     
     
         5 . A double-side polishing apparatus comprising at least the carrier for double-side polishing apparatus according to  claim 1 . 
     
     
         6 . A double-side polishing method for a semiconductor wafer, comprising: arranging the carrier according to  claim 1  between upper and lower turn tables holding the semiconductor wafer in a holding hole formed in the carrier; and sandwiching the semiconductor wafer between the upper and lower turn tables to perform double-side polishing. 
     
     
         7 . The carrier for double-side polishing apparatus according to  claim 2 , wherein the carrier has grooves each reaching the holding hole from a carrier outer peripheral side on front and back surfaces thereof. 
     
     
         8 . The carrier for double-side polishing apparatus according to  claim 7 , wherein a pattern of the grooves is a grid-like pattern or a radial pattern. 
     
     
         9 . A double-side polishing apparatus comprising at least the carrier for double-side polishing apparatus according to  claim 2 . 
     
     
         10 . A double-side polishing apparatus comprising at least the carrier for double-side polishing apparatus according to  claim 3 . 
     
     
         11 . A double-side polishing apparatus comprising at least the carrier for double-side polishing apparatus according to  claim 4 . 
     
     
         12 . A double-side polishing apparatus comprising at least the carrier for double-side polishing apparatus according to  claim 7 . 
     
     
         13 . A double-side polishing apparatus comprising at least the carrier for double-side polishing apparatus according to  claim 8 . 
     
     
         14 . A double-side polishing method for a semiconductor wafer, comprising: arranging the carrier according to  claim 2  between upper and lower turn tables holding the semiconductor wafer in a holding hole formed in the carrier; and sandwiching the semiconductor wafer between the upper and lower turn tables to perform double-side polishing. 
     
     
         15 . A double-side polishing method for a semiconductor wafer, comprising: arranging the carrier according to  claim 3  between upper and lower turn tables holding the semiconductor wafer in a holding hole formed in the carrier; and sandwiching the semiconductor wafer between the upper and lower turn tables to perform double-side polishing. 
     
     
         16 . A double-side polishing method for a semiconductor wafer, comprising: arranging the carrier according to  claim 4  between upper and lower turn tables holding the semiconductor wafer in a holding hole formed in the carrier; and sandwiching the semiconductor wafer between the upper and lower turn tables to perform double-side polishing. 
     
     
         17 . A double-side polishing method for a semiconductor wafer, comprising: arranging the carrier according to  claim 7  between upper and lower turn tables holding the semiconductor wafer in a holding hole formed in the carrier; and sandwiching the semiconductor wafer between the upper and lower turn tables to perform double-side polishing. 
     
     
         18 . A double-side polishing method for a semiconductor wafer, comprising: arranging the carrier according to  claim 8  between upper and lower turn tables holding the semiconductor wafer in a holding hole formed in the carrier; and sandwiching the semiconductor wafer between the upper and lower turn tables to perform double-side polishing.