Switch array circuit and system using programmable via structures with phase change materials
Abstract
The present invention provides at least one programmable via structure that includes at least two phase change material vias that are both directly contacting a heating element, the programmable via structure further including a first terminal in contact with a first portion of the heating element, a second terminal in contact with a second portion of the heating element, a third terminal in contact with one of the at least two programmable vias, and a fourth terminal in contact with another one of the at least two programmable vias; a first circuit block in contact with one of the third and fourth terminals; a second circuit block in contact with the third or fourth terminal not contacting the first circuit block; a source region of a first field effect transistor in contact with one of the first and second terminals; and a drain region of a second field effect transistor in contact with the first or second terminal that is not contacting the source region of the first field effect transistor. A method of operating the at least one programmable via structure is also provided.
Claims
exact text as granted — not AI-modified1 . A method comprising:
providing a structure including:
at least one programmable via structure including at least two phase change material vias that are both directly contacting a heating element, said programmable via structure further including a first terminal in contact with a first portion of said heating element, a second terminal in contact with a second portion of said heating element, a third terminal in contact with one of said at least two programmable vias, and a fourth terminal in contact with another one of said at least two programmable vias; a first circuit block in contact with one of said third and fourth terminals; a second circuit block in contact with the third or fourth terminal not contacting said first circuit block;
a source region of a first field effect transistor in contact with one of said first and second terminals, a drain region of said first field effect transistor in contact with a bit line, and a gate of said first field effect transistor in contact with a write line; and
a drain region of a second field effect transistor in contact with the first or second terminal that is not contacting said source region of said first field effect transistor, said second transistor further including a source region in contact to ground, and a gate of said first field effect transistor is in contact with said write line; and
applying a current pulse through said bit line wherein said current pulse passes through said heating element and changes an initial state of the at least two phase change materials to a secondary state.
2 . The method of claim 1 wherein said initial state is crystalline and said second state is amorphous and said current pulse melts and quenches/amorphizes a thin region of each of said phase change material vias.
3 . The method of claim 1 wherein said initial state is amorphous and said second state is crystalline and said current pulse anneals each of said phase change material vias.Join the waitlist — get patent alerts
Track US2009303786A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.