US2009303165A1PendingUtilityA1

Active matrix display device

Assignee: SEIKO EPSON CORPPriority: Aug 21, 1997Filed: Aug 13, 2009Published: Dec 10, 2009
Est. expiryAug 21, 2017(expired)· nominal 20-yr term from priority
Inventors:Ichio Yudasaka
H10K 59/8792H10K 59/122G09G 3/3225G09G 2320/0223G09G 2300/0842G09G 2300/0426G09G 2300/0439G09F 9/30H10K 59/131H10K 50/865H10K 71/135
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Claims

Abstract

In order to provide an active matrix display device in which parasitic capacitance or the like is suppressed by forming a thick insulating film around an organic semiconductor film and disconnection or the like does not occur in the opposing electrode formed on the upper layer of the thick insulating film, in an active matrix display device, first, a bank layer composed of a resist film is formed along data lines and scanning lines, and by depositing an opposing electrode of a thin film luminescent element on the upper layer side of the bank layer, capacitance that parasitizes the data lines can be suppressed. Additionally, a discontinuities portion is formed in the bank layer. Since the discontinuities portion is a planar section which does not have a step due to the bank layer, disconnection of the opposing electrode does not occur at this section. When an organic semiconductor film is formed by an ink jet process, a liquid material discharged from an ink jet head is blocked by the bank layer.

Claims

exact text as granted — not AI-modified
1 . A light emitting device, comprising:
 a light emitting element including:
 a first electrode; 
 a second electrode opposing the first electrode; and 
 an organic semiconductor film disposed between the first electrode and the second electrode, the organic semiconductor film emitting light in response to an electric current flowing between the first electrode and the second electrode; 
   a control transistor that controls the electric current;   an interconnecting electrode electrically connected to the control transistor, the interconnecting electrode being connected to the first electrode and formed so as not to overlap the organic semiconductor layer in the light emitting element in plan view; and   an electrode insulating film formed between the interconnecting electrode and the first electrode.   
   
   
       2 . The light emitting device according to  claim 1 ,
 the interconnecting electrode being electrically connected to the first electrode by a contact hole formed in the electrode insulating film, and   the organic semiconductor film being formed so as not to overlap the contact hole in plan view.   
   
   
       3 . The light emitting device according to  claim 1 , further comprising:
 an insulative bank layer disposed on the first electrode in a region that overlaps the interconnecting electrode in plan view.   
   
   
       4 . The light emitting device according to  claim 1 , further comprising:
 a transistor insulating film, the control transistor including:
 an island-like semiconductor film; and 
 a gate electrode formed on the island-shaped semiconductor film, the transistor insulating film formed between the gate electrode and the interconnecting electrode. 
   
   
   
       5 . The light emitting device according to  claim 3 , further comprising:
 a scanning line;   a data line that crosses the scanning line;   an electrical supply line; and   an intersection transistor disposed at an intersection of the scanning line and the data line, the intersection transistor being electrically connected to each of the scanning line and the data line,   the control transistor being electrically connected to the electrical supply line and having a gate electrode, and   the gate electrode of the control transistor being electrically connected to the intersection transistor.   
   
   
       6 . The light emitting device according to  claim 2 , further comprising:
 an insulative bank layer disposed on the first electrode in a region that overlaps the interconnecting electrode in plan view.   
   
   
       7 . The light emitting device according to  claim 2 ,
 the control transistor including:
 an island-like semiconductor film; and 
 a gate electrode formed on the island-shaped semiconductor film; and 
 a transistor insulating film formed between the gate electrode and the interconnecting electrode. 
   
   
   
       8 . The light emitting device according to  claim 3 , further comprising:
 a transistor insulating film, the control transistor including:
 an island-like semiconductor film; and 
 a gate electrode formed on the island-shaped semiconductor film, the transistor insulating film formed between the gate electrode and the interconnecting electrode. 
   
   
   
       9 . The light emitting device according to  claim 2 , further comprising:
   a scanning line;   a data line that crosses the scanning line;   an electrical supply line that crosses the scanning line; and     an intersection transistor disposed at an intersection of the scanning line and the data line, the intersection transistor being electrically connected to each of the scanning line and the data line,   the control transistor being electrically connected to the electrical supply line, and being electrically connected to the intersection transistor.   
   
   
       10 . The light emitting device according to  claim 3 , further comprising:
 a scanning line;   a data line that crosses the scanning line;   an electrical supply line; and   an intersection transistor disposed at an intersection of the scanning line and the data line, the intersection transistor being electrically connected to each of the scanning line and the data line,   the control transistor being electrically connected to the electrical supply line, and the gate electrode of the control transistor being electrically connected to the intersection transistor.   
   
   
       11 . The light emitting device according to  claim 4 , further comprising:
 a scanning line;   a data line that crosses the scanning line;   an electrical supply line; and   an intersection transistor disposed at an intersection of the scanning line and the data line, the intersection transistor being electrically connected to each of the scanning line and the data line,   the control transistor being electrically connected to the electrical supply line, and the gate electrode of the control transistor being electrically connected to the intersection transistor.

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