Noise isolation between circuit blocks in an integrated circuit chip

Abstract

An integrated circuit includes a p-well block region having a low doping concentration formed in a region of a substrate for providing noise isolation between a first circuit block and a second circuit block. The integrated circuit further includes a guard region and a grounded, highly doped region for providing additional noise isolation.

1 . An integrated circuit, comprising:
 a first circuit block formed in a substrate;   a second circuit block formed in the substrate; and   a plurality of regions formed between the first circuit block and the second circuit block, wherein the plurality of regions are configured to provide noise isolation between the first circuit block and the second circuit block, and the plurality of regions includes:   a p-well block region formed in the substrate, which has a first doping concentration of a p-type dopant, wherein the p-well block region is a ring formed so that at least a portion of the ring is positioned between the first circuit block and the second circuit block, and wherein the p-well block region does not include any active region therein,   a first portion of a guard region formed in the substrate between the p-well block region and the first circuit block, wherein the first portion of the guard region has a second doping concentration of a p-type dopant,   a second portion of the guard region formed in the substrate between the p-well block region and the second circuit block, wherein the second portion of the guard region has the second doping concentration,   a first grounded highly doped region formed in the substrate between the first portion of the guard region and the first circuit block, wherein the first grounded highly doped region has a third doping concentration of a p-type dopant, and   a second grounded highly doped region formed in the substrate between the second portion of the guard region and the second circuit block, wherein the second grounded highly doped region has the third doping concentration, and wherein the second doping concentration is higher than the first doping concentration, and the third doping concentration is higher than the second doping concentration.   
     
     
         2 . The integrated circuit of  claim 1 , wherein the p-well block region is a ring formed surrounding the first circuit block. 
     
     
         3 . The integrated circuit of  claim 1 , wherein the first portion of the guard region is a ring formed surrounding the first circuit block. 
     
     
         4 . The integrated circuit of  claim 1 , wherein the first portion of the guard region is a ring formed surrounding the p-well block region. 
     
     
         5 . The integrated circuit of  claim 1 , further comprising a first trench formed between the p-well block region and the first portion of the guard region. 
     
     
         6 . The integrated circuit of  claim 5 , wherein the first trench has a depth substantially deeper than the p-well block region and the first portion of the guard region. 
     
     
         7 . The integrated circuit of  claim 5 , further comprising a second trench formed between the p-well block region and the second portion of the guard region. 
     
     
         8 . The integrated circuit of  claim 7 , wherein the second trench has a depth substantially deeper than the p-well block region and the second portion of the guard region. 
     
     
         9 . The integrated circuit of  claim 1 , further comprising:
 a dielectric layer formed at least over the p-well block region and the first and second portions of the guard region; and   a grounded conductive shield formed over the dielectric layer.   
     
     
         10 . The integrated circuit of  claim 9 , wherein the grounded conductive shield is positioned such that an area occupied by the grounded conductive shield over the first circuit block is different from an area occupied by the grounded conductive shield over the second circuit block. 
     
     
         11 . The integrated circuit of  claim 1 , further comprising:
 at least one interconnect connecting the first circuit block to the second circuit block, which is formed at a greater distance from a top surface of the substrate in a region directly above the p-well block region than other regions above the substrate.   
     
     
         12 . An integrated circuit, comprising:
 a first circuit block formed in a substrate;   a second circuit block formed in the substrate;   a plurality of regions formed between the first circuit block and the second circuit block, wherein the plurality of regions are configured to provide noise isolation between the first circuit block and the second circuit block, and the plurality of regions includes:   a p-well block region formed in the substrate, which has a first doping concentration of a p-type dopant, wherein the p-well block region is at least partially positioned between the first circuit block and the second circuit block, and wherein the p-well block region does not include any active region therein,   a first portion of a guard region formed in the substrate between the p-well block region and the first circuit block, wherein the first portion of the guard region has a second doping concentration of a p-type dopant,   a first trench formed between the p-well block region and the first portion of the guard region,   a first grounded highly doped region formed in the substrate between the first portion of the guard region and the first circuit block, wherein the first grounded highly doped region has a third doping concentration of a p-type dopant, and wherein the second doping concentration is higher than the first doping concentration, and the third doping concentration is higher than the second doping concentration.   
     
     
         13 . The integrated circuit of  claim 12 , wherein the first trench has a depth substantially deeper than the p-well block region and the first portion of the guard region. 
     
     
         14 . The integrated circuit of  claim 12 , further comprising:
 a second portion of the guard region formed in the substrate between the p-well block region and the second circuit block, wherein the second portion of the guard region has the second doping concentration.   
     
     
         15 . The integrated circuit of  claim 14 , further comprising:
 a second grounded highly doped region formed in the substrate between the second portion of the guard region and the second circuit block, wherein the second grounded highly doped region has the third doping concentration.   
     
     
         16 . The integrated circuit of  claim 14 , further comprising a second trench formed between the p-well block region and the second portion of the guard region. 
     
     
         17 . The integrated circuit of  claim 16 , wherein the second trench has a depth substantially deeper than the p-well block region and the second portion of the guard region. 
     
     
         18 . The integrated circuit of  claim 12 , wherein the p-well block region is a ring surrounding the first circuit block. 
     
     
         19 . The integrated circuit of  claim 12 , wherein the first portion of the guard region is a ring formed surrounding the first circuit block, between the first circuit block and the p-well block region. 
     
     
         20 . The integrated circuit of  claim 12 , wherein the first grounded highly doped region is a ring formed surrounding the first circuit block, between the first circuit block and the p-well block region.