Method of Forming a Thin Film Transistor
Abstract
A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing. Preferably, the annealing temperature is both sufficiently high to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries, but sufficiently low to prevent chemical reaction of the fluorine containing layer with the polycrystalline thin film layer.
Claims
exact text as granted — not AI-modified1 . A semiconductor construction comprising:
a polycrystalline material having grains and grain boundaries and having fluorine non-uniformly distributed between the grains and the grain boundaries; a fluorine-containing material operably adjacent the polycrystalline material, the fluorine-containing material comprising tungsten; and a transistor gate operably adjacent the polycrystalline material.
2 . The semiconductor construction of claim 1 wherein the polycrystalline material comprises germanium-silicon.
3 . The semiconductor construction of claim 1 wherein the polycrystalline material and the fluorine-containing material are present on a substrate having an insulative layer thereon.
4 . The semiconductor construction of claim 3 wherein the insulative layer underlies both the polycrystalline material and the fluorine-containing material.
5 . The semiconductor construction of claim 1 wherein the at least some of the fluorine present at the grain boundaries bonds with silicon.
6 . The semiconductor construction of claim 1 further comprising a gate dielectric layer overlying the polycrystalline material and the fluorine-containing material.
7 . The semiconductor construction of claim 6 wherein the transistor gate overlies the gate dielectric layer.
8 . A semiconductor construction comprising:
a passivated polycrystalline material layer, the passivated polycrystalline material layer being formed by a method comprising:
providing a layer of polycrystalline material over a substrate, the polycrystalline material having grains and grain boundaries;
forming a fluorine-containing layer proximate the layer of polycrystalline material; and
transferring fluorine into the grain boundaries from the fluorine-containing layer to form the passivated polycrystalline material layer, the passivated polycrystalline material layer having fewer dangling bonds than would occur had the fluorine present in the passivated layer been provided by implanting.
9 . The semiconductor construction of claim 8 wherein the polycrystalline material comprises at least one member of the group consisting of silicon and germanium.
10 . The semiconductor construction of claim 8 wherein the passivated polycrystalline layer has fluorine non-uniformly distributed between the grains and the grain boundaries.
11 . The semiconductor construction of claim 8 wherein the polycrystalline material comprises silicon and wherein at least some of the fluorine present within the grain boundaries is bonded to Si atoms.
12 . The semiconductor construction of claim 8 wherein the passivated polycrystalline material layer is incorporated into a thin film transistor.Join the waitlist — get patent alerts
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