MECHANICALLY ROBUST METAL/LOW-k INTERCONNECTS
Abstract
A mechanically robust semiconductor structure with improved adhesion strength between a low-k dielectric layer and a dielectric-containing substrate is provided. In particular, the present invention provides a structure that includes a dielectric-containing substrate having an upper region including a treated surface layer which is chemically and physically different from the substrate; and a low-k dielectric material located on a the treated surface layer of the substrate. The treated surface layer and the low-k dielectric material form an interface that has an adhesion strength that is greater than 60% of the cohesive strength of the weaker material on either side of the interface. The treated surface is formed by treating the surface of the substrate with at least one of actinic radiation, a plasma and e-beam radiation prior to forming of the substrate the low-k dielectric material.
Claims
exact text as granted — not AI-modified1 . A semiconductor structure comprising:
a dielectric-containing substrate having an upper region including a treated surface layer which is chemically and physically different from said substrate; and a low-k dielectric having a dielectric constant of less than 4.0 located on a said treated surface layer of said substrate, wherein said treated surface layer and said low-k dielectric form an interface that has an adhesion strength that is greater than 60% of the cohesive strength of the weaker material on either side of said interface.
2 . The semiconductor structure of claim 1 wherein said dielectric-containing substrate is a dielectric capping material that is formed atop a dielectric material including at least one conductive feature embedded therein.
3 . The semiconductor structure of claim 2 wherein said dielectric capping layer is selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, SiC, Si 4 NH 3 , SiCH, a carbon doped oxide, a nitrogen and hydrogen doped silicon carbide SiC(N,H) and multilayers thereof.
4 . The semiconductor structure of claim 2 wherein said dielectric material is a low-k dielectric selected from the group consisting of a silsesquioxane, a C doped oxide that include atoms of Si, C, O and H, thermosetting polyarylene ethers, SiC, SiCH, SiCN, SiCHN, or multilayers thereof.
5 . The semiconductor structure of claim 1 wherein said low-k dielectric is selected from the group consisting of a silsesquioxane, a C doped oxide that include atoms of Si, C, O and H, thermosetting polyarylene ethers, SiC, SiCH, SiCN, SiCHN, or multilayers thereof.
6 . The semiconductor structure of claim 1 wherein an upper surface region in said low-k dielectric is a treated surface layer which is chemically and physically different from said low-k dielectric.
7 . The semiconductor structure of claim 1 further comprising a dielectric capping layer located atop said low-k dielectric.Join the waitlist — get patent alerts
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