US2009279364A1PendingUtilityA1

Method of programming in a flash memory device

Assignee: HYNIX SEMICONDUCTOR INCPriority: Aug 6, 2007Filed: Jul 20, 2009Published: Nov 12, 2009
Est. expiryAug 6, 2027(~1 yrs left)· nominal 20-yr term from priority
G11C 11/5628G11C 16/3418G11C 16/10G11C 16/3427G11C 16/34G11C 16/24G11C 16/12
40
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Claims

Abstract

A method of programming a flash memory device includes programming a first memory cell coupled to an even bit line by applying a first program voltage to a word line, and verifying whether the first memory cell is programmed through a first verifying voltage. The first program voltage that is repeatedly increased by a step voltage when the first memory cell is not programmed. A second memory cell coupled to an odd bit line is programmed by applying the first program voltage to the word line. Whether the second memory cell is programmed is verified using a second verifying voltage that is higher than the first verifying voltage. The second memory cell is programmed using a program voltage that is repeatedly increased by the step voltage when the second memory cell is not programmed.

Claims

exact text as granted — not AI-modified
1 . A method of programming a flash memory device, the method comprising:
 programming a first memory cell by applying a program voltage;   verifying whether the first memory cell is programmed by applying a first verifying voltage;   programming a second memory cell by applying the program voltage; and   verifying whether the second memory cell is programmed by applying a second verifying voltage.   
   
   
       2 . The method of  claim 1 , wherein the second verifying voltage is greater than the first verifying voltage. 
   
   
       3 . The method of  claim 1 , wherein the first memory cell and second memory cells are coupled to a word line. 
   
   
       4 . The method of  claim 1 , wherein a bit line of the first memory cell is adjacent to a bit line of the second memory cell. 
   
   
       5 . A method of programming a flash memory device, the method comprising:
 programming a first memory cell by applying a first program voltage;   verifying whether the first memory cell is programmed by applying a first verifying voltage;   programming a second memory cell by applying a second program voltage; and   verifying whether or not the second memory cell is programmed by applying a second verifying voltage,   wherein the second verifying voltage is greater than the first verifying voltage.   
   
   
       6 . The method of  claim 5 , wherein a level of the first program voltage is the same as a level of the second program voltage. 
   
   
       7 . The method of  claim 5 , wherein a level of the first program voltage is different than a level of the second program voltage. 
   
   
       8 . The method of  claim 5 , wherein the first memory cell and second memory cells are coupled to a word line. 
   
   
       9 . The method of  claim 5 , wherein a bit line of the first memory cell is adjacent to a bit line of the second memory cell. 
   
   
       10 . A method of programming a flash memory device, the method comprising:
 programming a first memory cell by applying a first program voltage;   verifying whether the first memory cell is programmed by applying a first verifying voltage;   programming a second memory cell by applying a second program voltage; and   verifying whether the first memory cell is programmed by applying a second verifying voltage,   wherein the first memory cell and second memory cell are coupled to a word line.   
   
   
       11 . The method of  claim 10 , wherein the second verifying voltage is greater than the first verifying voltage. 
   
   
       12 . The method of  claim 10 , wherein a level of the first program voltage is the same as a level of the second program voltage. 
   
   
       13 . The method of  claim 10 , wherein a level of the first program voltage is different than a level of the second program voltage. 
   
   
       14 . The method of  claim 10 , wherein a bit line of the first memory cell is adjacent to a bit line of the second memory cell.

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