Semiconductor device and manufacturing method thereof

Abstract

A semiconductor device with a fuse 3 a to be cut for a circuit modification, of which passivation film coating the uppermost wiring layer is formed in a two-layer structure including a first insulating film 11 with high filling capability and a second insulating film 12 blocking penetration of moisture or impurities. An opening 21 formed in a specific depth through the insulating films on the fuse 3 a is coated by a third insulating film 13 with the blocking capability. This prevents the penetration of moisture or impurities, and the corrosion of the fuse 3 a.

1 - 13 . (canceled) 
   
   
       14 . A method of manufacturing a semiconductor device, comprising the steps of:
 (a) forming an interlayer insulator in which a first wiring layer including a fuse is provided;   (b) forming a second wiring layer including a wiring on the interlayer insulator;   (c) forming a first insulating film so as to coat the wiring;   (d) forming a second insulating film so as to coat the first insulating film;   (e) forming an opening above the fuse by etching the first and second insulating films; and   (f) forming a third insulating film so as to coat at least the opening.   
   
   
       15 . A method of manufacturing a semiconductor device according to  claim 14 , wherein, in step (f), the third insulating film formed on the opening substantially conformally coats the opening. 
   
   
       16 . A method of manufacturing a semiconductor device according to  claim 14 , wherein, in step (f), the third insulating film formed on the opening is formed along a surface of the opening. 
   
   
       17 . A method of manufacturing a semiconductor device according to  claim 14 , wherein, in step (e), a part of the interlayer insulator above the fuse is further removed. 
   
   
       18 . A method of manufacturing a semiconductor device according to  claim 14 , wherein, in step (e), the interlayer insulator above the fuse is further removed and the fuse is exposed. 
   
   
       19 . A method of manufacturing a semiconductor device according to  claim 14 , wherein, in step (e), a part of the interlayer insulator above the fuse is further removed and the thinned interlayer insulator is left above the fuse. 
   
   
       20 . A method of manufacturing a semiconductor device according to  claim 14 , wherein, in step (e), a part of the interlayer insulator and a part of the first insulating film are left above the fuse. 
   
   
       21 . A method of manufacturing a semiconductor device according to  claim 14 , wherein the second insulating film has blocking capability against penetration of moisture or impurities higher than that of the first insulating film. 
   
   
       22 . A method of manufacturing a semiconductor device according to  claim 14 , wherein the third insulating film has blocking capability against penetration of moisture or impurities same as or higher than that of the second insulating film. 
   
   
       23 . A method of manufacturing a semiconductor device according to  claim 14 , wherein the first insulating film is a Non Doped Silicon Glass film deposited by High-Density Plasma Chemical Vapor Deposition process. 
   
   
       24 . A method of manufacturing a semiconductor device according to  claim 14 , wherein the first insulating film is a silicon nitride film deposited by Chemical Vapor Deposition process. 
   
   
       25 . A method of manufacturing a semiconductor device according to  claim 14 , wherein the second insulating film and the third insulating film are silicon nitride films deposited by Chemical Vapor Deposition process. 
   
   
       26 . A semiconductor device, comprising:
 a interlayer insulator in which a first wiring layer including a fuse is provided;   a second wiring layer including a wiring formed on the interlayer insulator;   a first insulating film formed on the wiring;   a second insulating film formed on the first insulating film;   an opening formed above the fuse; and   a third insulating film coating at least the opening.   
   
   
       27 . A semiconductor device according to  claim 26 , wherein the third insulating film coating the opening is substantially a conformal coating film. 
   
   
       28 . A semiconductor device according to  claim 26 , wherein a surface of the third insulating film coating the opening is along a surface of the opening. 
   
   
       29 . A semiconductor device according to  claim 26 , wherein the third insulating film contacts with the fuse. 
   
   
       30 . A semiconductor device according to  claim 26 , wherein a portion of the first insulating film, the portion being partially reduced in thickness, is located on the fuse. 
   
   
       31 . A semiconductor device according to  claim 26 , wherein the second wiring layer includes a plurality of wirings and the first insulating film coats the wirings, and the first insulating film fills a gap between the wirings without voids. 
   
   
       32 . A semiconductor device according to  claim 26 , wherein the second insulating film has blocking capability against penetration of moisture or impurities higher than that of the first insulating film. 
   
   
       33 . A semiconductor device according to  claim 26 , wherein the third insulating film has blocking capability against penetration of moisture or impurities same as or higher than that of the second insulating film.