Low k interconnect dielectric using surface transformation

Abstract

Systems, devices and methods are provided to improve performance of integrated circuits by providing a low-k insulator. One aspect is an integrated circuit insulator structure. One embodiment includes a solid structure of an insulator material, and a precisely determined arrangement of at least one void formed within the solid structure which lowers an effective dielectric constant of the insulator structure. One aspect is a method of forming a low-k insulator structure. In one embodiment, an insulator material is deposited, and a predetermined arrangement of at least one hole is formed in a surface of the insulator material. The insulator material is annealed such that the low-k dielectric material undergoes a surface transformation to transform the arrangement of at least one hole into predetermined arrangement of at least one empty space below the surface of the insulator material. Other aspects are provided herein.

1 . A structure, comprising:
 an insulator structure of an insulator material; and   the insulator structure including an arrangement of a plurality of voids having a predetermined void-to-void spacing, wherein each void has a shape and size formed through a surface transformation process, wherein the surface transformation process includes:
 forming holes with predetermined dimensions and spacing through a surface of the insulator structure; and 
 annealing the insulator structure to transform the holes through the surface of the insulator structure into the arrangement of the voids with the predetermined void-to-void spacing, wherein the void-to-void spacing and the shape and size of each void is controlled by the predetermined dimensions and spacing of the holes, 
   wherein the arrangement of at least one void within the insulator structure lowers an effective dielectric constant of the insulator structure.   
   
   
       2 . The structure of  claim 1 , wherein the insulator material is a low-k insulator material. 
   
   
       3 . The structure of  claim 2 , wherein the insulator material includes silicon. 
   
   
       4 . The structure of  claim 2 , wherein the insulator material includes a multi-component composition. 
   
   
       5 . The structure of  claim 2 , wherein the insulator material includes a eutectic multi-component composition. 
   
   
       6 . The structure of  claim 1 , wherein the insulator material has a low annealing temperature. 
   
   
       7 . The structure of  claim 6 , wherein the insulator material includes lead acetate. 
   
   
       8 . The structure of  claim 6 , wherein the insulator material includes a eutectic multi-component composition. 
   
   
       9 . The structure of  claim 1 , wherein the plurality of voids includes a plate-shaped void. 
   
   
       10 . The structure of  claim 9 , wherein the plurality of voids includes a stack of a plate-shaped voids. 
   
   
       11 . The structure of  claim 1 , wherein the plurality of voids includes at least one pipe-shaped void. 
   
   
       12 . A structure, comprising:
 an insulator structure of a low-k insulator material; and   the insulator structure including an arrangement of a plurality of sphere-shaped voids having a predetermined void-to-void spacing, wherein each void has a shape and size formed through a surface transformation process, wherein the surface transformation process includes:
 forming holes with predetermined dimensions and spacing through a surface of the insulator structure; and 
 annealing the insulator structure to transform the holes through the surface of the insulator structure into the arrangement of the voids with the predetermined void-to-void spacing, wherein the void-to-void spacing and the shape and size of each void is controlled by the predetermined dimensions and spacing of the holes, 
   wherein the precisely-determined arrangement of at least one void within the solid structure lowers an effective dielectric constant of the insulator structure.   
   
   
       13 . The structure of  claim 12 , wherein the arrangement of the plurality of sphere-shaped voids includes a close-packed structure of empty spheres. 
   
   
       14 . The structure of  claim 12 , wherein at least one of the plurality of sphere-shaped voids has a diameter of approximately 1 micron. 
   
   
       15 . The structure of  claim 12 , wherein at least one of the plurality of sphere-shaped voids has a diameter of approximately 0.2 micron. 
   
   
       16 . An electronic system, comprising:
 a processor; and   a memory coupled to the processor,   wherein the processor and the memory are formed as at least one integrated circuit, including:
 a plurality of devices; 
 at least one metal level operatively coupled to the plurality of devices; and 
   an insulator structure of an insulator material between the plurality of devices and the at least one metal level, the insulator structure including an arrangement of a plurality of voids having a predetermined void-to-void spacing, wherein each void has a shape and size formed through a surface transformation process, wherein the surface transformation process includes:
 forming holes with predetermined dimensions and spacing through a surface of the insulator structure; and 
 annealing the insulator structure to transform the holes through the surface of the insulator structure into the arrangement of the voids with the predetermined void-to-void spacing, wherein the void-to-void spacing and the shape and size of each void is controlled by the predetermined dimensions and spacing of the holes, 
   wherein the arrangement of the plurality of voids within the insulator structure lowers an effective dielectric constant of the insulator structure and improves the performance of the processor and the memory.   
   
   
       17 . The electronic system of  claim 16 , wherein the insulator material is a low-k insulator material. 
   
   
       18 . The electronic system of  claim 17 , wherein the insulator material includes silicon. 
   
   
       19 . The electronic system of  claim 17 , wherein the insulator material includes a multi-component composition. 
   
   
       20 . The electronic system of  claim 16 , wherein the insulator material includes a eutectic multi-component composition. 
   
   
       21 . The electronic system of  claim 16 , wherein the insulator material includes a material having a low melting temperature such that the insulator material is capable of being annealed at a low annealing temperature. 
   
   
       22 . The electronic system of  claim 16 , wherein the arrangement of the plurality of voids includes a close-packed structure.