US2009243664A1PendingUtilityA1

Data transfer method, data transfer circuit, output circuit, input circuit, semiconductor device, and electronic apparatus

Assignee: PIONEER CORPPriority: Jul 11, 2003Filed: Feb 4, 2009Published: Oct 1, 2009
Est. expiryJul 11, 2023(expired)· nominal 20-yr term from priority
Inventors:Toshiaki Inoue
H04L 25/0282H04L 25/02H04L 25/49H03K 17/16H03M 5/20
53
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Claims

Abstract

A data transfer circuit comprises a voltage/current converter circuit for converting a first binary voltage data of n bits (n is an integer equal to or larger than two) to multi-value current data of 2 n values which is output to a single data transfer line. A current comparator circuit converts the multi-value current data on the data transfer line to binary current data of (2 n −1) bits, and a current/voltage converter circuit converts the binary current data of the (2 n −1) bits to second binary voltage data of (2 n −1) bits. A counter circuit restores the first binary voltage data of the n bits from the second binary voltage data of the (2 n −1) bits.

Claims

exact text as granted — not AI-modified
1 - 16 . (canceled) 
     
     
         17 . An output circuit comprising:
 an input unit for receiving binary voltage data X i  (i is an integer equal to or larger than zero and equal to or smaller than n−1) of n bits (n is an integer equal to or larger than two); and   a group of current mirror circuits for outputting current values proportional to 2 i ,   wherein the output currents of said group of current mirror circuits are multiplexed to generate a current value proportional to Σ2 i X i  in accordance with the binary voltage data X i .   
     
     
         18 . An output circuit comprising:
 an input unit for receiving binary voltage data X i  (i is an integer equal to or larger than zero and equal to or smaller than n−1) of n bits (n is an integer equal to or larger than two);   a first transistor provided for each bit of the n bits of the binary voltage data X i , and having a source terminal connected to a power supply terminal or a ground terminal, and a gate terminal and a drain terminal connected to each other;   a second transistor provided for said each bit, applied with the binary voltage data X I  at a gate terminal, and having a drain terminal connected to the drain terminal of said first transistor;   a third transistor provided for said each bit, and having a source terminal connected to the power supply terminal or the ground terminal, a gate terminal connected to the gate terminal of said first transistor, and a drain terminal connected to a multi-value current data output line; and   a constant current source provided for said each bit, and connected between the source terminal of said second transistor and the ground terminal or the power supply terminal,   wherein said output circuit outputs multi-value current data having a current value proportional to Σ2 i X i  to said multi-value current data output line in accordance with the binary voltage data X i .   
     
     
         19 . An output circuit comprising:
 sets of first transistors to third transistors arranged in parallel, corresponding respectively to n bits (n is an integer equal to or larger than two) of binary voltage data Xi (i is an integer equal to or larger than zero and equal to or smaller than n−1) of the n bits supplied from the outside,   wherein said first transistor and said third transistor have source terminals connected to a common power supply terminal or a common ground terminal, said second transistor has a source terminal connected to a common regulated current, said third transistor has a drain connected to a common multi-value current data line, and a current value proportional to Σ2 i X i  in accordance with the binary voltage data X i  is output to the common multi-value current data output line.   
     
     
         20 . An output circuit according to  claim 19 , wherein:
 said third transistor has a size which is set to generate an output current value proportional to 2 i  in accordance with the binary voltage data X i .   
     
     
         21 . An input circuit comprising:
 a current comparator circuit; and   a current/voltage converter circuit,   wherein said current comparator circuit comprises:   an input unit for receiving single multi-value current data of 2 n  values (n is an integer equal to or larger than 2);   (2 n −1) independent current mirror circuits, said multi-value current data being expanded to said (2 n −1) current mirror circuits; and   (2 n −1) threshold current sources for supplying threshold currents corresponding to the 2 n  value of the multi-value current data to said (2 n −1) current mirror circuits, respectively, and   binary voltage data of a corresponding bit of (2 n −1) bits is output based on current driving capabilities of each of said (2 n −1) current mirror circuits and the threshold current from a corresponding one of said (2 n −1) threshold current sources, and   said current/voltage converter circuit converts the binary current data of the (2 n −1) bits to binary voltage data of the (2 n −1) bits.   
     
     
         22 . An input circuit according to  claim 21 , wherein:
 said current comparator circuit comprises:   a fourth transistor provided for each bit of the (2 n −1) bits, applied with the multi-value current data at a drain terminal, and having a gate terminal connected to the drain terminal, and a source terminal connected to a common ground terminal or a common power supply terminal;   a fifth transistor provided for said each bit, and having a gate terminal connected to the gate terminal of said fourth transistor, and a source terminal connected to the common ground terminal or the common power supply terminal; and   a constant current source provided for said each bit and connected between the drain terminal of said fifth transistor and the common power supply terminal or the common ground terminal.   
     
     
         23 . An input circuit comprising:
 a current comparator circuit; and   a current/voltage converter circuit,   wherein said current comparator circuit comprises:   (2 n −1) sets of a fifth transistor arranged in parallel to a single multi-value current data input of 2 n  values (n is an integer equal to or larger than two) supplied from the outside, and a threshold current source for outputting a threshold current used to discriminate the multi-value current data,   said current comparator circuit has said fifth transistor having a source terminal connected to a common ground terminal or a common power supply terminal, and said threshold current source connected to a common power supply terminal or a common ground terminal, and outputs binary current data of (2 n −1) bits based on the multi-value current data and the threshold current from said threshold current source, and   said current/voltage converter circuit converts the binary current data of the (2 n −1) bits to binary voltage data of the (2 n −1) bits.   
     
     
         24 . An input circuit according to  claim 23 , wherein:
 said current comparator circuit detects a bit corresponding to the multi-value current data within the (2 n −1) bits based on a drain current of said fifth transistor and the threshold current of said threshold current source, and outputs the binary current data of the (2 n −1) bits having a bit corresponding to the largest threshold current at the most significant bit.   
     
     
         25 . An input circuit according to any of  claims 21  to  24 , wherein:
 said current/voltage converter circuit comprises:   (2 n −1) circuit units arranged in parallel to the binary current data inputs of the (2 n −1) bits,   each of said (2 n −1) circuit units comprises a sixth transistor and a seventh transistor,   said sixth transistor has a source terminal connected to the common power supply terminal or the common ground terminal, and said sixth transistor has a gate terminal and a drain terminal connected to each other,   said seventh transistor has a source terminal connected to a third constant current source, said seventh transistor is applied with the binary current data of a corresponding bit of the (2 n −1) bits at a gate terminal, and the binary voltage data of the corresponding bit is output from the drain terminal of said sixth transistor connected to the drain terminal of said seventh transistor.   
     
     
         26 . An input circuit according to  claim 25 , wherein:
 said third constant current source is set to output the binary voltage data having a voltage level indicative of logical “0” or “1” for each of the (2 n −1) bits of the binary current data, and   said current/voltage converter circuit outputs the binary voltage data of the (2 n −1) bits having binary voltage data corresponding to binary current data at the most significant bit at the most significant bit, and binary voltage data corresponding to binary current data at the least significant bit at the least significant bit.   
     
     
         27 . A semiconductor device comprising the output circuit according to any of  claims 17  to  20 . 
     
     
         28 . A semiconductor device comprising the input circuit according to any of  claims 21  to  24 . 
     
     
         29 . An electronic apparatus comprising the output circuit according to any of  claims 17  to  20 , wherein the single multi-value current data is output from said output circuit. 
     
     
         30 . An electronic apparatus comprising the input circuit according to any of  claims 21  to  24 , for converting the single multi-value current data supplied from the outside to binary voltage data.

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