Semiconductor device and bypass capacitor module

Abstract

A semiconductor device includes an Si substrate having a first surface provided with semiconductor elements, such as a CMOS transistor and a diode, and a second surface opposite to the first surface. On one of the first and the second surfaces, a bypass capacitor is formed. The bypass capacitor includes a Vcc power supply layer and a GND layer which serve to supply a power supply voltage to the semiconductor element, and a high dielectric constant layer sandwiched between the Vcc power supply layer and the GND layer.

1 . A semiconductor device including a substrate having a first surface and a second surface opposite to the first surface, a semiconductor element formed on the first surface of the substrate, and a bypass capacitor formed on one of the first and the second surfaces of the substrate, the bypass capacitor comprising a power supply layer and a ground layer which serve to supply a power supply voltage to the semiconductor element, and a high dielectric constant layer sandwiched between the power supply layer and the ground layer. 
   
   
       2 . The semiconductor device according to  claim 1 , wherein the bypass capacitor is formed on the first surface of the substrate. 
   
   
       3 . The semiconductor device according to  claim 1 , wherein the bypass capacitor is formed on the second surface of the substrate. 
   
   
       4 . The semiconductor device according to  claim 1 , wherein the power supply layer is separated into a plurality of sections corresponding to a plurality of circuit blocks, respectively. 
   
   
       5 . The semiconductor device according to  claim 1 , wherein the semiconductor element is a P-channel MOS transistor having a source electrode connected to the power supply layer and a drain electrode connected to the ground layer. 
   
   
       6 . The semiconductor device according to  claim 1 , wherein the semiconductor element is an N-channel MOS transistor having a drain electrode connected to the power supply layer and a source electrode connected to the ground layer. 
   
   
       7 . The semiconductor device according to  claim 1 , wherein the semiconductor element is a CMOS transistor comprising a P-channel MOS transistor and an N-channel MOS transistor, the P-channel MOS transistor having a source electrode connected to the power supply layer, the N-channel MOS transistor having a source electrode connected to the ground layer. 
   
   
       8 . The semiconductor device according to  claim 1 , wherein the semiconductor element is a diode having an anode electrode connected to one of the power supply layer and the ground layer and a cathode electrode connected to the other of the power supply layer and the ground layer. 
   
   
       9 . The semiconductor device according to  claim 1 , wherein the bypass capacitor has a module structure. 
   
   
       10 . The semiconductor device according to  claim 9 , wherein the power supply layer and the ground layer of the bypass capacitor are connected to the substrate via bonding wires. 
   
   
       11 . The semiconductor device according to  claim 9 , wherein the power supply layer and the ground layer of the bypass capacitor are connected to the substrate via solder balls. 
   
   
       12 . A bypass capacitor module to be mounted on a substrate of a semiconductor device, the bypass capacitor module comprising:
 a power supply layer and a ground layer which serve to supply a power supply voltage to a semiconductor element formed on the substrate; and   a high dielectric constant layer sandwiched between the power supply layer and the ground layer.   
   
   
       13 . The bypass capacitor module according to  claim 12 , wherein the bypass capacitor module has a sheet-like structure. 
   
   
       14 . The bypass capacitor module according to  claim 12 , wherein the power supply layer and the ground layer are connected to the substrate via bonding wires. 
   
   
       15 . The bypass capacitor module according to  claim 12 , wherein the power supply layer and the ground layer are connected to the substrate via solder balls. 
   
   
       16 . A semiconductor device including a substrate having a first surface and a second surface opposite to the first surface, a semiconductor element formed on the first surface of the substrate, and a bypass capacitor which is internally formed between a power supply layer and a ground layer.