US2009224303A1PendingUtilityA1

High voltage capacitor and manufacture method thereof

Assignee: NOVATEK MICROELECTRONICS CORPPriority: Mar 6, 2008Filed: Jul 9, 2008Published: Sep 10, 2009
Est. expiryMar 6, 2028(~1.6 yrs left)· nominal 20-yr term from priority
Inventors:Jui-Chang Lin
H10D 86/60H10D 86/40H10D 86/00H10D 1/66H10D 1/047
44
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Claims

Abstract

A high voltage capacitor and a manufacture method thereof are provided. The high voltage capacitor comprises a double diffused drain layer, an oxide layer and a poly-crystal silicon layer. The double diffused drain layer is used as a bottom electrode plate of a high voltage capacitor. The oxide layer is formed on the double diffused drain layer, and is completely overlapped on the double diffused drain layer. The poly-crystal silicon layer is formed on the oxide layer, and is used as a top electrode plate of the high voltage capacitor.

Claims

exact text as granted — not AI-modified
1 . A method of manufacture a high voltage capacitor, the method comprising:
 forming a double diffused drain (DDD) layer as a bottom electrode plate of a high voltage capacitor;   forming an oxide layer on the double diffused drain layer, wherein the oxide layer is completely overlapped on the double diffused drain layer; and   forming a poly-crystal silicon layer on the oxide layer as a top electrode plate of the high voltage capacitor.   
   
   
       2 . The manufacture method according to  claim 1 , further comprising:
 providing a substrate; and   forming a first well on the substrate for forming the double diffused drain layer.   
   
   
       3 . The manufacture method according to  claim 2 , further comprising:
 forming another double diffused drain (DDD) layer on the first well as a bottom electrode plate of another high voltage capacitor;   forming another oxide layer on the other double diffused drain layer, wherein the other oxide layer is completely overlapped on the other double diffused drain layer; and   forming another poly-crystal silicon layer on the other oxide layer as a top electrode plate of the high voltage capacitor.   
   
   
       4 . The manufacture method according to  claim 3 , further comprising:
 forming an isolation element between the double diffused drain layer and the other double diffused drain layer.   
   
   
       5 . The manufacture method according to  claim 4 , wherein the isolation element is a shallow trench isolation (STI) layer. 
   
   
       6 . The manufacture method according to  claim 4 , wherein the isolation element is a field oxide (FOX) layer. 
   
   
       7 . The manufacture method according to  claim 1 , the high voltage capacitor is used in a liquid crystal display driver integrated circuit. 
   
   
       8 . A high voltage capacitor, comprising:
 a double diffused drain (DDD) layer used as a bottom electrode plate of a high voltage capacitor;   an oxide layer formed on the double diffused drain layer, wherein the oxide layer is completely overlapped on the double diffused drain layer; and   a poly-crystal silicon layer formed on the oxide layer and used as a top electrode plate of the high voltage capacitor.   
   
   
       9 . The high voltage capacitor according to  claim 8 , wherein the double diffused drain layer is formed on a first well, which is formed on a substrate. 
   
   
       10 . The high voltage capacitor according to  claim 9 , wherein another double diffused drain (DDD) layer is formed on the first well as a bottom electrode plate of another high voltage capacitor. 
   
   
       11 . The high voltage capacitor according to  claim 10 , wherein the other double diffused drain layer forms another oxide layer completely overlapped on the other double diffused drain layer. 
   
   
       12 . The high voltage capacitor according to  claim 11 , wherein another poly-crystal silicon layer is formed on the other oxide layer as a top electrode plate of the high voltage capacitor. 
   
   
       13 . The high voltage capacitor according to  claim 12 , wherein an isolation element is formed between the double diffused drain layer and the other double diffused drain layer. 
   
   
       14 . The high voltage capacitor according to  claim 13 , wherein the isolation element is a shallow trench isolation (STI) layer. 
   
   
       15 . The high voltage capacitor according to  claim 13 , wherein the isolation element is a field oxide (FOX) layer. 
   
   
       16 . The high voltage capacitor according to  claim 8 , wherein the high voltage capacitor is used in a liquid crystal display driver integrated circuit.

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