Chip package and process thereof

Abstract

A chip package is disclosed. The chip package comprises a chip, a plurality of bond pads, a plurality of connecting lines and a rigid cover. The chip has a plurality of recesses arranged along at least an edge of the chip and also has an active surface and a backside. The bond pads are disposed on the active surface and the bond pads are arranged to be corresponding to the recesses respectively. The connecting lines are disposed on surfaces of the recesses respectively at the edge of the chip. For each of the connecting lines, a first end of the connecting line is connected to one of the bond pads and a second end of the connecting line extends to the backside to be a terminal pad. The rigid cover is located on the active surface without covering the bond pads on the active surface.

1 . A chip package, comprising:
 a chip having a plurality of recesses arranged along at least an edge of the chip, wherein the chip has an active surface and a backside opposite to the active surface;   a plurality of bond pads on the active surface of the chip, wherein the bond pads are arranged to be corresponding to the recesses respectively;   a plurality of connecting lines disposed on surfaces of the recesses respectively at the edge of the chip, wherein, for each of the connecting lines, a first end of the connecting line is connected to one of the bond pads and a second end of the connecting line extends to the backside of the chip to be a terminal pad; and   a rigid cover located on the active surface of the chip without covering the bond pads on the active surface of the chip.   
   
   
       2 . The chip package of  claim 1  further comprising an adhesive layer disposed between the chip and the rigid cover, wherein the rigid cover is adhered to the chip via the adhesive layer. 
   
   
       3 . The chip package of  claim 1  further comprising a plurality of contacts electrically connected to the terminal pads respectively. 
   
   
       4 . The chip package of  claim 3 , wherein the contacts include conductive bumps. 
   
   
       5 . The chip package of  claim 3 , wherein the contacts are connected to the PCB. 
   
   
       6 . The chip package of  claim 1 , wherein the chip includes a redistribution layer on the active surface of the chip to form the bond pads. 
   
   
       7 . The chip package of  claim 1 , wherein the material of the rigid cover is selected from a group comprising a conducting material, an insulating material, and a transparent material. 
   
   
       8 . The chip package of  claim 1 , wherein the bond pads are disposed on the chip as an array. 
   
   
       9 . The chip package of  claim 1 , wherein the bond pads are disposed in an interior region of the chip.