Semiconductor Device and Method for Manufacturing the Same

Abstract

A method for manufacturing a semiconductor device includes forming a transistor having a stacked structure in a peripheral circuit region to increase net die and forming a metal silicide layer over a source/drain region of a transistor formed over an upper layer to reduce a contact resistance. The semiconductor device may include: a second active region including a silicon layer connected to a first active region of a semiconductor substrate; a gate formed over the second active region; a spacer formed on sidewalls of the gate; a source/drain region form at both sides of the spacer; and a metal silicide layer formed over the gate and the source/drain region

1 . A semiconductor device comprising:
 a first active region including a first transistor; and   a second active region including a second transistor located over the first active region,   wherein the second active region is connected to the first active region and the second transistor includes a silicide layer on a source and a drain.   
   
   
       2 . The semiconductor device according to  claim 1 , wherein the second active region includes a silicon layer. 
   
   
       3 . The semiconductor device according to  claim 1 , further comprising an intervening layer formed between the first active region and the second active region. 
   
   
       4 . The semiconductor device according to  claim 3 , comprising a gate insulating layer formed on the second active region, a gate formed on the gate insulating layer, and a spacer formed on sidewalls of the gate. 
   
   
       5 . The semiconductor device according to  claim 4 , wherein the gate includes the silicide layer and a polysilicon layer. 
   
   
       6 . The semiconductor device according to  claim 4 , wherein when the gate insulating layer includes one selected from the group consisting of a HfO2, a Al2O3, a ZrO2, a ZrSiO4, a HfSiO4, and combinations thereof, the gate consists of the silicide layer. 
   
   
       7 . The semiconductor device according to  claim 1 , wherein the silicide layer includes one selected from the group consisting of a titanium silicide layer, a cobalt silicide layer, a nickel silicide layer, a tungsten silicide layer, and combinations thereof. 
   
   
       8 . A method for manufacturing a semiconductor device, the method comprising:
 forming a first active region in a semiconductor substrate;   forming a second active region over the first active region, wherein the second active region is connected to the first active region;   forming a gate on the second active region;   forming a spacer at sidewalls of the gate;   forming a source/drain region in the second active region of both sides of the spacer; and   forming a silicide layer on the gate and the source/drain region.   
   
   
       9 . The method according to  claim 8 , wherein the forming the second active region includes;
 forming an insulating film on the first active region;   forming a contact hole exposing the first active region by penetrating the insulating film; and   forming a silicon layer in the contact hole and on the insulating film.   
   
   
       10 . The method according to  claim 9 , wherein the silicon layer is formed to have a thickness in a range of from 500 Å to 20000 Å at a top surface of the insulating film. 
   
   
       11 . The method according to  claim 9 , wherein the silicon layer is formed by a selective epitaxial growth. 
   
   
       12 . The method according to  claim 8 , further comprising forming a gate insulating layer between the second active region and the gate. 
   
   
       13 . The method according to  claim 12 , wherein the gate includes a polysilicon layer. 
   
   
       14 . The method according to  claim 13 , wherein the forming a silicide layer includes;
 forming a metal layer on the gate, the spacer, and the source/drain region, and the second active region;   performing a thermal process to the metal layer; and   removing the metal layer which was remained after the thermal process.   
   
   
       15 . The method according to  claim 14 , wherein the gate insulating layer includes one selected from the group consisting of a HfO2, a Al2O3, a ZrO2, a ZrSiO4, a HfSiO4, and combinations thereof, the gate becomes the silicide layer by the thermal process. 
   
   
       16 . The method according to  claim 14 , wherein the metal layer includes one selected from the group consisting of a titanium, a cobalt, a nickel, a tungsten, and combinations thereof. 
   
   
       17 . The method according to  claim 14 , wherein the removing process is performed by a wet etching.