US2009216521A1PendingUtilityA1

Emulation export sequence with distrubuted control

Assignee: TEXAS INSTRUMENTS INCPriority: Mar 2, 2000Filed: Mar 10, 2009Published: Aug 27, 2009
Est. expiryMar 2, 2020(expired)· nominal 20-yr term from priority
G06F 9/455Y02D10/00G06F 11/3648G06F 11/261G06F 11/3632Y10S370/914G06F 11/364G06F 11/3656G01R 31/31705G06F 11/3466G06F 11/3636
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Claims

Abstract

Emulation information including emulation control information and emulation data is exported from a data processor by arranging the emulation information into information blocks, and outputting a sequence of the information blocks from the data processor. Some of the information blocks of the sequence have relative proportions of emulation control information and emulation data that differ from the relative proportions of emulation control information and emulation data in other blocks of the sequence.

Claims

exact text as granted — not AI-modified
1 . A method of exporting from a data processor emulation information including emulation control information and emulation data, comprising:
 arranging the emulation information into information blocks, including providing some of the information blocks with relative proportions of emulation control information and emulation data that differ from the relative proportions of emulation control information and emulation data in others of the information blocks; and   using a plurality of terminals of the data processor to output the information blocks in a sequential order, for receipt in said sequential order by an input of a destination that is external to the data processor;   wherein first emulation control information in one of the information blocks specifies a meaning of second emulation control information in another of the information blocks, and wherein said second emulation control information is formatted to have more than one meaning.   
   
   
       2 . The method of  claim 1 , wherein said one information block precedes said another information block in said sequential order. 
   
   
       3 . The method of  claim 1 , wherein said first emulation control information indicates that said second emulation control information identifies a location of an associated portion of said emulation data. 
   
   
       4 . The method of  claim 3 , wherein said associated portion of emulation data corresponds to an address used by the data processor for a memory access. 
   
   
       5 . The method of  claim 3 , wherein said associated portion of emulation data corresponds to content of a program counter of the data processor. 
   
   
       6 . The method of  claim 3 , wherein said associated portion of emulation data corresponds to content of a memory access performed by the data processor. 
   
   
       7 . The method of  claim 3 , wherein said associated portion of emulation data corresponds to a relative branch taken by the data processor. 
   
   
       8 . The method of  claim 3 , wherein said associated portion of emulation data corresponds to an indirect branch taken by the data processor. 
   
   
       9 . The method of  claim 3 , wherein said first emulation control information specifies a meaning of third emulation control information in a further one of the information blocks, and wherein said third emulation control information is formatted to have more than one meaning. 
   
   
       10 . The method of  claim 9 , wherein said first emulation control information specifies a same meaning for both said second emulation control information and said third emulation control information. 
   
   
       11 . An integrated circuit apparatus, comprising:
 a data processing portion for performing data processing operations;   an emulation information collector coupled to said data processing portion for receiving emulation data therefrom, said collector operable for arranging the emulation data into information blocks together with associated emulation control information, said collector providing some of the information blocks with relative proportions of emulation control information and emulation data that differ from the relative proportions of emulation control information and emulation data in others of the information blocks;   a plurality of output terminals coupled to said collector for permitting said collector to communicate with a destination external to said integrated circuit apparatus; and   said collector cooperable with said output terminals for outputting said information blocks from said integrated circuit apparatus in a sequential order, for receipt in said sequential order at an input of the external destination;   wherein first emulation control information in one of the information blocks specifies a meaning of second emulation control information in another of the information blocks, and wherein said second emulation control information is formatted to have more than one meaning.   
   
   
       12 . The apparatus of  claim 11 , wherein said one information block precedes said another information block in said sequential order. 
   
   
       13 . The apparatus of  claim 11 , wherein said first emulation control information indicates that said second emulation control information identifies a location of an associated portion of said emulation data. 
   
   
       14 . The apparatus of  claim 13 , wherein said associated portion of emulation data corresponds to an address used by the data processor for a memory access. 
   
   
       15 . The apparatus of  claim 13 , wherein said associated portion of emulation data corresponds to content of a program counter of the data processor. 
   
   
       16 . The apparatus of  claim 13 , wherein said associated portion of emulation data corresponds to content of a memory access performed by the data processor. 
   
   
       17 . The apparatus of  claim 13 , wherein said associated portion of emulation data corresponds to a relative branch taken by the data processor. 
   
   
       18 . The apparatus of  claim 13 , wherein said associated portion of emulation data corresponds to an indirect branch taken by the data processor. 
   
   
       19 . The apparatus of  claim 13 , wherein said first emulation control information specifies a meaning of third emulation control information in a further one of the information blocks, and wherein said third emulation control information is formatted to have more than one meaning. 
   
   
       20 . The apparatus of  claim 19 , wherein said first emulation control information specifies a same meaning for both said second emulation control information and said third emulation control information.

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