US2009212389A1PendingUtilityA1

Semiconductor device with capacitor and fuse, and method for manufacturing the same

Assignee: HYNIX SEMICONDUCTOR INCPriority: Jun 29, 2006Filed: Apr 30, 2009Published: Aug 27, 2009
Est. expiryJun 29, 2026(expired)· nominal 20-yr term from priority
Inventors:Roh Il Cheol
H10W 20/494H10D 1/716G11C 29/785G11C 17/16H10B 12/033H10B 12/50
34
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Claims

Abstract

A semiconductor device with a capacitor and a fuse, and a method for manufacturing the same are described. The semiconductor device comprises a semiconductor substrate having a capacitor region and a fuse region defined therein, a insulating layer over the semiconductor substrate, a storage node hole formed in the insulating layer, a barrier metal in the storage node hole, a dielectric layer formed on the barrier metal and the insulating layer, a lower metal layer for a plate electrode filling the storage node hole such that it is flush with the dielectric layer, an upper metal layer for the plate electrode on the dielectric layer and lower metal layer for the plate electrode; and a fuse metal layer formed of the same material as that of the upper metal layer for the plate electrode on the dielectric layer in the fuse region.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device with a capacitor and a fuse, comprising:
 a semiconductor substrate having a capacitor region and a fuse region defined therein;   a insulating layer over the semiconductor substrate;   a storage node hole formed in the insulating layer;   a barrier metal in the storage node hole;   a dielectric layer formed on the barrier metal and the insulating layer;   a lower metal layer for a plate electrode filling the storage node hole such that it is flush with the dielectric layer;   an upper metal layer for the plate electrode on the dielectric layer and lower metal layer for the plate electrode; and   a fuse metal layer formed of the same material as that of the upper metal layer for the plate electrode on the dielectric layer in the fuse region.   
   
   
       2 . The semiconductor device according to  claim 1 , wherein the lower metal layer for the plate electrode comprises a titanium nitride layer deposited by chemical vapor deposition. 
   
   
       3 . The semiconductor device according to  claim 1 , wherein the upper metal layer for the plate electrode and the fuse metal layer comprise a titanium nitride layer deposited by physical vapor deposition.

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