US2009203430A1PendingUtilityA1

Hybrid memory system and spin-buffer journaling in a gaming machine

Assignee: IGT RENO NEVPriority: Feb 7, 2008Filed: Feb 7, 2008Published: Aug 13, 2009
Est. expiryFeb 7, 2028(~1.5 yrs left)· nominal 20-yr term from priority
G07F 17/3223G07F 17/32
49
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Claims

Abstract

A gaming machine is comprised of a processor, an interface, and a hybrid non-volatile memory component having a byte-addressable non-volatile memory sub-component and a block-addressable non-volatile memory sub-component. The machine is capable of storing critical gaming data or data that is required to be stored pursuant to gaming regulations in an efficient, reliable, and cost-effective manner. The byte-addressable sub-component (the “expensive” memory) has at least three buffers for temporarily storing critical game data and the block-addressable sub-component (the “lower cost” memory) has at least one block for storing game data, wherein critical gaming data is transferred from the byte-addressable sub-component to the block-addressable sub-component, where it is permanently stored. The block-addressable memory may be flash memory. A confirmation is sent from the block-addressable sub-component to the byte-addressable sub-component when the critical gaming data is permanently stored. The critical gaming data is deleted from the byte-addressable sub-component when the confirmation is received. In one embodiment, the byte-addressable sub-component is a memory that continues to store data during a power loss, in contrast to the block-addressable memory, which may lose data during a write operation if a disruption occurs.

Claims

exact text as granted — not AI-modified
1 . A gaming machine comprising:
 at least one processor;   at least one interface;   a hybrid non-volatile memory component having a byte-addressable non-volatile memory sub-component and a block-addressable non-volatile memory sub-component, the byte-addressable sub-component having at least three buffers and the block-addressable sub-component having at least one block, wherein critical gaming data is transferred from the byte-addressable sub-component to the block-addressable sub-component, where it is permanently stored; and   wherein a confirmation is sent from the block-addressable sub-component to the byte-addressable sub-component when the critical gaming data is permanently stored; and   wherein the critical gaming data is deleted from the byte-addressable sub-component when the confirmation is received.   
   
   
       2 . A gaming machine as recited in  claim 1  further comprising:
 a hybrid non-volatile memory manager for controlling operations of the hybrid non-volatile memory component.   
   
   
       3 . A gaming machine as recited in  claim 1  wherein the block-addressable sub-component is a flash memory. 
   
   
       4 . A gaming machine as recited in  claim 1  wherein the size of a buffer in the byte-addressable sub-component depends on the size of a block in block-addressable sub-component. 
   
   
       5 . A gaming machine as recited in  claim 1  wherein critical gaming data is selected from the group consisting of game history information, security information, accounting information, player tracking information, wide area progressive information, game state information, game usage information, game transactional information, game meter information, bonus of game information, and player input information. 
   
   
       6 . A gaming machine as recited in  claim 1  wherein the hybrid non-volatile memory manager is an FPGA. 
   
   
       7 . A gaming machine as recited in  claim 6  wherein the hybrid non-volatile memory component and the memory manager are on the same chip in the gaming machine. 
   
   
       8 . A gaming machine as recited in  claim 7  wherein the chip is on a main processing board of the gaming machine. 
   
   
       9 . A gaming machine as recited in  claim 1  wherein the critical gaming data is transmitted to the hybrid non-volatile memory component from the at least one processor. 
   
   
       10 . A method of storing gaming data in a hybrid memory component in a gaming machine, the gaming data required to be stored by a gaming operator pursuant to gaming regulations, the method comprising:
 receiving gaming data at the hybrid memory component from one or more components in the gaming machine;   determining if a byte-addressable non-volatile memory buffer in the hybrid memory component is at maximum storage capacity with gaming data;   if it is at maximum storage capacity, writing the gaming data from the buffer to a block in the block-addressable non-volatile memory, wherein the gaming data continues to be stored in the buffer during the writing;   if it is not at maximum storage capacity, continuing to receive gaming data from the one or more components;   if the writing operation is complete, at the block-addressable non-volatile memory, checking if the gaming data has been stored persistently;   is if the gaming data has been stored persistently in the block-addressable non-volatile memory, sending a confirmation from the block-addressable non-volatile memory to the byte-addressable non-volatile memory buffer; and   deleting the gaming data from the buffer when the confirmation is received, thereby freeing the buffer to receive new data, such that gaming data is not lost if there is a disruption during the writing operation.   
   
   
       11 . A method as recited in  claim 10  further comprising checking the contents of the buffer to determine if the buffer is at maximum storage capacity. 
   
   
       12 . A method as recited in  claim 10  further comprising sending the confirmation to a non-volatile memory manager, wherein the non-volatile memory manager is a component in the hybrid memory component of the gaming machine. 
   
   
       13 . A method as recited in  claim 10  further comprising:
 reading byte-addressable non-volatile memory administrative data to determine a next available buffer for receiving gaming data; and   changing a state of the buffer to indicate it is receiving gaming data.   
   
   
       14 . A method as recited in  claim 10  further comprising:
 determining if the writing operation of gaming data from the buffer to the block is complete; and   if complete, changing a state of the buffer to indicate that it is at maximum storage capacity.   
   
   
       15 . A method as recited in  claim 10  further comprising:
 determining if the writing operation was in progress between a byte-addressable buffer and the block in block-addressable non-volatile memory during a disruption in the gaming machine operations;   if gaming data was being written to the block during the disruption, erasing the data from the block upon resumption of gaming machine operations; and   re-writing the gaming data from the byte-addressable buffer to the block.   
   
   
       16 . A method as recited in  claim 15  further comprising:
 reading administrative data in the byte-addressable non-volatile memory to determine which sectors in the block should be erased.   
   
   
       17 . A method as recited in  claim 15  further comprising checking a state variable of the block-addressable buffer. 
   
   
       18 . A method as recited in  claim 10  wherein the gaming data is selected from the group consisting of game history information, security information, accounting information, player tracking information, wide area progressive information and game state information, game usage information, game transactional information, game meter information, bonus of game information, and player input information. 
   
   
       19 . A gaming device capable of storing required gaming data pursuant to wager gaming regulations comprising:
 a master gaming controller;   a hybrid non-volatile memory component having a byte-addressable memory, a block-addressable memory, and an FPGA; and   a memory storing computer instructions for:   receiving the required gaming data at the hybrid memory component from the master gaming controller;   determining if a byte-addressable non-volatile memory buffer in the hybrid memory component is at maximum storage capacity with required gaming data;   if it is at maximum storage capacity, writing the required gaming data from the buffer to a block in the block-addressable memory, wherein the required gaming data continues to be stored in the buffer during the writing;   if it is not at maximum storage capacity, continuing to receive required gaming data from the master gaming controller;   if the writing operation is complete, at the block-addressable memory, checking if the required gaming data has been journaled persistently;   if the required gaming data has been journaled persistently in the block-addressable memory, sending a confirmation from the block-addressable memory to the byte-addressable memory buffer; and   deleting the required gaming data from the buffer when the confirmation is received, thereby freeing the buffer to receive new required gaming data, such that required gaming data being written is not lost if there is a disruption in the gaming device operations during the writing operation, and   wherein the gaming device is able to store required gaming data pursuant to gaming regulations using a combination of lower-cost non-volatile memory for long-term persistent journaling and higher-cost memory for intermediate buffering of the required gaming data.   
   
   
       20 . A gaming device as recited in  claim 19  wherein the memory further comprises computer code for:
 determining if the writing operation of required gaming data from the buffer to the block is complete; and   if complete, changing a state of the buffer to indicate that it is at maximum storage capacity.   
   
   
       21 . A gaming device as recited in  claim 19  wherein the memory further comprises computer code for:
 determining if the writing operation was in progress between a byte-addressable buffer and the block in block-addressable memory during a disruption in the gaming machine operations;   if the required gaming data was being written to the block during the disruption, erasing the required data from the block upon resumption of gaming machine operations; and   re-writing the required gaming data from the byte-addressable buffer to the block.   
   
   
       22 . A gaming device as recited in  claim 19  wherein the required gaming data is selected from the group consisting of game history information, security information, accounting information, player tracking information, wide area progressive information, game state information, game usage information, game transactional information, game meter information, bonus of game information, and player input information.

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