Semiconductor device and method of manufacturing the same

Abstract

A semiconductor device comprises an active region formed in a semiconductor substrate and a gate electrode formed on the active region via a gate insulating film formed on a surface of the active region. A peripheral portion of the gate electrode and a peripheral portion of the active region overlap each other at a position where the active region is not divided by the gate electrode when viewed in plan view, thus forming an overlap region.

1 . A semiconductor device comprising:
 an active region formed in a semiconductor substrate; and   a gate electrode formed on the active region via a gate insulating film formed on a surface of the active region;   wherein a peripheral portion of the gate electrode and a peripheral portion of the active region overlap each other at a position where the active region is not divided by the gate electrode when viewed in plan view, thus forming an overlap region.   
   
   
       2 . The semiconductor device according to  claim 1 , wherein, as viewed in plan view, the active region has a rectangular shape and the overlap region is positioned along at least one side of the active region. 
   
   
       3 . The semiconductor device according to  claim 1 , wherein, as viewed in plan view, the active region has a rectangular shape and the gate electrode is provided with an opening that is smaller than the active region, and the overlap region is formed by at least a part of a peripheral portion of the active region and at least a part of a peripheral portion of the opening in the gate electrode. 
   
   
       4 . The semiconductor device according to  claim 1 , wherein, as viewed in plan view, the active region comprises a central rectangular portion and an extension portion extending from the central rectangular portion, and the overlap region is positioned at the distal end of the extension portion of the active region. 
   
   
       5 . The semiconductor device according to  claim 1 , wherein, as viewed in plan view, the active region has a rectangular shape and the gate electrode is provided with a rectangular opening, and wherein the overlap region is formed by a corner of the active region and a side of a peripheral portion of the opening of the gate electrode. 
   
   
       6 . The semiconductor device according to  claim 1 , wherein, as viewed in plan view, the active region has a rectangular shape and the gate electrode comprises a cut portion, and wherein the overlap region is formed by a corner of the active region and a side of a peripheral portion of the cut portion of the gate electrode. 
   
   
       7 . The semiconductor device according to  claim 1 , wherein, as viewed in plan view, the active region comprises a notch portion and the overlap region is positioned along at least one of a plurality of sides of the notch portion of the active region. 
   
   
       8 . The semiconductor device according to  claim 1 , wherein, as viewed in plan view, the overlap region is located on a straight line that joins a first contact plug to a second contact plug and that is positioned therebetween, the first contact plug being connected to the active region that forms said overlap region, the second contact plug being connected to the gate electrode that forms said overlap region. 
   
   
       9 . The semiconductor device according to  claim 8 , wherein, as viewed in plan view, the gate electrode extends along the straight line. 
   
   
       10 . The semiconductor device according to  claim 1 , wherein the gate electrode and the active region operates as an anti-fuse element. 
   
   
       11 . The semiconductor device according to  claim 10 , wherein the anti-fuse element flows an electric current by destroying the gate insulating film at the overlap region. 
   
   
       12 . A semiconductor device comprising:
 a semiconductor substrate; and   an anti-fuse element disposed on the semiconductor substrate, wherein the anti-fuse element comprises:   an active region disposed on the semiconductor substrate, having a rectangular shape;   an isolation region for surrounding the active region; and   a gate electrode disposed over the active region and the isolation region, wherein the active region of the anti-fuse element has four edges for defining the rectangular shape, and the gate electrode of the antifuse is located facing to a part of the active region with an intervention of a gate insulating film therebetween, and the gate electrode of the anti-fuse element is located being across at only one edge which defines a border between the active region and the isolation region.   
   
   
       13 . The semiconductor device according to  claim 12 , further comprising:
 a first contact plug connected to the gate electrode of the anti-fuse element; and   a second contact plug connected to the active region of the anti-fuse element, wherein the edge of the active region under the gate electrode of the anti-fuse element is perpendicular to a line which connects between the first contact plug and the second contact plug.   
   
   
       14 . The semiconductor device according to  claim 13 , wherein the gate electrode of the anti-fuse extends over the isolation region, along to the line which connects between the first contact plug and the second contact plug.