Semiconductor Flash Memory Device and Method of Fabricating the Same

Abstract

A semiconductor flash memory device. The flash memory device includes a floating gate electrode disposed in a recess having slanted sides in a semiconductor substrate. A gate insulation film is interposed between the floating gate electrode and the semiconductor substrate. A control gate electrode is disposed over the floating gate electrode. The floating gate electrode includes projections adjacent to the slanted sides of the recess.

1 . A semiconductor flash memory device comprising:
 a floating gate electrode disposed in a recess having slanted sides in a semiconductor substrate;   a gate insulation film interposed between the floating gate electrode and the semiconductor substrate; and   a control gate electrode disposed over the floating gate electrode,   wherein a width of the recess is narrower towards a bottom of the recess than towards a top of the recess,   wherein the floating gate electrode includes projections adjacent to the slanted sides of the recess.   
   
   
       2 . The semiconductor flash memory device as set forth in  claim 1 , wherein the floating gate electrode comprises lower and upper floating gate portions,
 wherein the lower floating gate portion is configured with sidewalls narrowing downward,   wherein the upper floating gate portion is configured with sidewalls narrowing upward,   wherein the projections are defined by the sidewalls of the lower and upper floating gate portions.   
   
   
       3 . The semiconductor flash memory device as set forth in  claim 2 , wherein a curvature radius of the projections is smaller than a thickness of the lower and upper floating gate portions. 
   
   
       4 . The semiconductor flash memory device as set forth in  claim 1 , wherein the top of the floating gate electrode is leveled higher than the semiconductor substrate. 
   
   
       5 . The semiconductor flash memory device as set forth in  claim 1 , wherein the control gate electrode comprises:
 a lower control gate portion narrower than the top of the floating gate electrode in width; and   an upper control gate portion wider than the top of the floating gate electrode in width.   
   
   
       6 . The semiconductor flash memory device as set forth in  claim 1 , further comprising an inter-gate insulation film interposed between the floating gate electrode and the control gate electrode,
 wherein the inter-gate insulation film is configured to have the same profile as the lower side of the control gate electrode.   
   
   
       7 . The semiconductor flash memory device as set forth in  claim 1 , further comprising:
 spacers disposed adjacent to sidewalls of the floating and control gate electrodes; and   a first impurity diffusion region disposed in the semiconductor substrate adjacent to a first side of the floating gate electrode and a second impurity diffusion region disposed in the semiconductor substrate adjacent to a second side of the floating gate electrode,   wherein the first and second impurity diffusion regions overlap with the lower sides of the floating gate electrode.