Thin film transistor, method of fabricating the same and organic light emitting diode display device having the same

Abstract

A thin film transistor which has improved characteristics, a method of fabricating the same, and an organic light emitting diode (OLED) display device having the same. The thin film transistor includes a substrate, a semiconductor layer disposed on the substrate and including a channel region, and source and drain regions, the channel region being doped with impurities, a thermal oxide layer disposed on the semiconductor layer, a silicon nitride layer disposed on the thermal oxide layer, a gate electrode disposed on the silicon nitride layer and corresponding to a predetermined region of the semiconductor layer, an interlayer insulating layer disposed on the entire surface of the substrate, and source and drain electrodes electrically connected with the semiconductor layer.

1 . A thin film transistor, comprising:
 a substrate;   a semiconductor layer disposed on the substrate and including a channel region, and source and drain regions, the channel region being doped with impurities;   a thermal oxide layer disposed on the semiconductor layer;   a silicon nitride layer disposed on the thermal oxide layer;   a gate electrode disposed on the silicon nitride layer and corresponding to a predetermined region of the semiconductor layer;   an interlayer insulating layer disposed on the entire surface of the substrate; and   source and drain electrodes electrically connected with the semiconductor layer.   
   
   
       2 . The thin film transistor according to  claim 1 , wherein the thermal oxide layer is formed to a thickness of 50 Å to 300 Å. 
   
   
       3 . The thin film transistor according to  claim 1 , wherein the thermal oxide layer includes a silicon oxide layer. 
   
   
       4 . A method of fabricating a thin film transistor, comprising:
 preparing a substrate;   forming a polycrystalline silicon layer on the substrate; injecting impurities into the polycrystalline silicon layer for channel doping;   patterning the polycrystalline silicon layer and forming a semiconductor layer;   annealing the semiconductor layer in an H 2 O atmosphere, and forming a thermal oxide layer on the semiconductor layer;   forming a silicon nitride layer on the thermal oxide layer;   forming a gate electrode at a location corresponding to a predetermined region of the semiconductor layer;   forming an interlayer insulating layer on the entire surface of the substrate; and   forming source and drain electrodes electrically connected with the semiconductor layer.   
   
   
       5 . The method according to  claim 4 , wherein the annealing is performed by rapid thermal annealing (RTA). 
   
   
       6 . The method according to  claim 4 , wherein the annealing is performed at a temperature ranging from 400° C. to 550° C. 
   
   
       7 . The method according to  claim 4 , wherein the annealing in the H 2 O atmosphere is performed at a pressure ranging from 10000 Pa to 2 MPa. 
   
   
       8 . The method according to  claim 4 , wherein the source and drain regions are formed by injecting impurities into the semiconductor layer after forming the gate electrode. 
   
   
       9 . The method according to  claim 4 , wherein the channel doping is performed by injecting boron (B) or phosphorous (p) impurities. 
   
   
       10 . The method according to  claim 4 , wherein the channel doping is performed by injecting impurities at a dose ranging from 0.5×10 12 /cm 2  to 1.5×10 12 /cm 2 . 
   
   
       11 . An organic light emitting diode (OLED) display device, comprising:
 a substrate;   a semiconductor layer disposed on the substrate, and including a channel region and source and drain regions, the channel region being doped with impurities;   a thermal oxide layer disposed on the semiconductor layer;   a silicon nitride layer disposed on the thermal oxide layer;   a gate electrode disposed on the silicon nitride layer and corresponding to a predetermined region of the semiconductor layer;   an interlayer insulating layer disposed on the entire surface of the substrate;   source and drain electrodes electrically connected with the semiconductor layer;   a first electrode electrically connected with one of the source and drain electrodes;   an organic layer disposed on the first electrode; and   a second electrode disposed on the organic layer.   
   
   
       12 . The OLED display device according to  claim 11 , wherein the thermal oxide layer is formed to a thickness of 50 Å to 300 Å. 
   
   
       13 . The OLED display device according to  claim 11 , wherein the thermal oxide layer is formed of silicon oxide.