Slim Spacer Implementation to Improve Drive Current
Abstract
Slim spacers are implemented in transistor fabrication. More particularly, wide sidewall spacers are initially formed and used to guide dopants into source/drain regions in a semiconductor substrate. The wide sidewall spacers are then removed and slim sidewall spacers are formed alongside a gate stack of the transistor. The slim spacers facilitate transferring stress from an overlying pre metal dielectric (PMD) liner to a channel of the transistor, and also facilitate reducing a resistance in the transistor by allowing silicide regions to be formed closer to the channel. This mitigates yield loss by facilitating predictable or otherwise desirable behavior of the transistor.
Claims
exact text as granted — not AI-modified1 . A transistor formed on a semiconductor substrate, comprising:
a gate stack; sidewall spacers on either side of the gate stack; source/drain regions in the substrate on either side of the gate stack and sidewall spacers, the sidewall spacers having a width between about 10 nm and about 30 nm.
2 . The transistor of claim 1 , comprising:
silicide regions in the substrate over the source/drain regions.
3 . The transistor of claim 2 , comprising:
a pre metal dielectric (PMD) liner over the silicide regions, sidewall spacers and gate stack, where the sidewall spacers facilitate transferring stress from the PMD liner to a channel region in the substrate below the gate stack and between the source/drain extension regions.Join the waitlist — get patent alerts
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