Photodetector

Abstract

The present invention aims at providing a photodetector which can detect the incident light intensity with a high speed while having a wide dynamic range for incident light intensity detection. Each photodiode PD m,n generates electric charges Q by an amount corresponding to the intensity of light incident thereon. An electric charge amount level determining circuit 10 m,n is provided so as to correspond to the photodiode PD m,n , determines the level of the amount of electric charges Q generated by the photodiode PD m,n , and outputs a level signal Level indicative of the result of level determination. The capacitance value of the integral capacitance part 21 in the integrating circuit 20 m is set by the respective level signals Level sequentially fed from N electric charge amount level determining circuits 10 m,1 to 10 m,N . The integrating circuit 20 m accumulates the electric charges Q fed to the input terminal sequentially from the N electric charge amount level determining circuits 10 m,1 to 10 m,N into the integral capacitance part 21 , and outputs a voltage V 20 corresponding to the amount of thus accumulated electric charges Q from the output terminal.

1 - 7 . (canceled) 
   
   
       8 : An imaging system comprising:
 a first integrated circuit including a photodiode array comprising a plurality of integrating photodiode elements formed in an array of elements in a first and a second direction, the integrated circuit providing a plurality of output signals corresponding to an output of each photodiode; and   a second integrated circuit for receiving as inputs the plurality of output signals from the first integrated circuit and including a plurality of multiplexers corresponding to the number of elements in the first direction in the array, the output signals from a respective set of elements in a first direction forming inputs to a respective multiplexer, each multiplexer for selectively connecting one of the output signals to a multiplexer output, wherein each multiplexer is selectively switched between the plurality of output signals.   
   
   
       9 : The imaging system of  claim 8 ,
 wherein the array of elements in the first and second direction is an array of rows and columns;   the plurality of multiplexers correspond to the number of columns in the array; and   the output signals from a respective column form the inputs to the respective multiplexer.   
   
   
       10 : The imaging system of  claim 9 , wherein each multiplexer is selectively switched between the plurality of output signals by a plurality of control lines, the number of control lines corresponding to the number of rows in the array. 
   
   
       11 : A photo detector module including:
 a first integrated circuit including an array of photodiodes, an output of each photodiode forming an output signal of the first integrated circuit; and   a second integrated circuit for receiving as inputs the output signals of the first integrated circuit, and for selectively connecting the output signals to at least one array output signal.   
   
   
       12 : The detector according to  claim 11  wherein the array of photodiodes are integrating photodiodes. 
   
   
       13 : The detector according to  claim 11  further including a capacitor connected in parallel across each photodiode. 
   
   
       14 : The detector of  claim 11 , wherein the number of array output signal lines is less than the number of array output signals. 
   
   
       15 : The detector of  claim 14 , wherein a plurality of the output signals are grouped, such output signals being for selectively connecting to one array output signal. 
   
   
       16 : The detector of  claim 15 , wherein there is provided a plurality of grouped output signals, each for selectively connecting to a respective array output signal. 
   
   
       17 : The detector of  claim 11 , wherein the second integrated circuit includes a multiplexing means, the multiplexing means including a multiplexer associated with each column of the photodiode array, wherein the output signals of each column are provided as inputs to the respective multiplexer, for multiplexing onto a single array output signal. 
   
   
       18 : The detector of  claim 11 , wherein the array comprises a plurality of rows, the multiplexing means adapted to receive a plurality of control signals corresponding to the number of rows and for selecting an output signal from each column for connection to the array output signal. 
   
   
       19 : The detector of  claim 17 , wherein each multiplexer comprises a plurality of switches. 
   
   
       20 : A detector according to  claim 19  wherein the switches comprise transistors. 
   
   
       21 : The detector of  claim 11 , wherein the at least one array output signal forms at least one output of the second integrated circuit. 
   
   
       22 : The detector of  claim 11  wherein the at least one array output signal forms at least one input to processing circuitry on the second integrated circuit.