Semiconductor integrated circuit device operating with low power consumption
Abstract
Transistors having large gate tunnel barriers are used as transistors to be on in a standby state, MIS transistors having thin gate insulating films are used as transistors to be off in the standby state, and main and sub-power supply lines and main and sub-ground lines forming a hierarchical power supply structure are isolated from each other in the standby state so that a gate tunnel current is reduced in the standby state in which a low power consumption is required. In general, a gate tunnel current reducing mechanism is provided for any circuitry operating in a standby state and an active state, and is activated in the standby state to reduce the gate tunnel current in the circuitry in the standby state, to reduce power consumption in the standby state.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
a first power source node; a logic gate including, as a component thereof, an insulated gate field effect transistor having a first gate tunnel barrier, for receiving a voltage on a first power source line as an operation power supply voltage and performing a predetermined operation; and a first switching transistor connected between said first power source node and said first power source line, formed of an insulated gate field effect transistor having a gate tunnel barrier larger than said first gate tunnel barrier, and selectively turned on in response to an operation mode instructing signal instructing an operation mode of said logic gate.
2 . The semiconductor device according to claim 1 , wherein
said first gate tunnel barrier is equivalent to a gate tunnel barrier of a silicon oxide film having a thickness of 3 nanometers at most.
3 . The semiconductor device according to claim 1 , wherein
said insulated gate field effect transistor of said logic gate has a gate insulating film of 3 nanometers at most in thickness.
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