US2009179273A1PendingUtilityA1

Semiconductor device

Assignee: YOKOGAWA ELECTRIC CORPPriority: Jan 15, 2008Filed: Jan 12, 2009Published: Jul 16, 2009
Est. expiryJan 15, 2028(~1.5 yrs left)· nominal 20-yr term from priority
H10D 30/66H10D 64/517H10D 64/516H10D 62/307H10D 12/441H10D 64/518H10D 62/393H10D 30/0291
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Claims

Abstract

A semiconductor device according to the present invention includes: a first region having a first conductive type; a plurality of second regions having a second conductive type that differs from the first conductive type, and formed to be arranged in the first region; a plurality of third regions having the first conductive type and formed in the second regions; an electrode forming a channel between the first region and the third region; and a plurality of extended second regions having the second conductive type, arranged in the first region such as to individually include one of the second regions and having an impurity density that is lower than an impunity density of the second regions.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a first region having a first conductive type;   a plurality of second regions having a second conductive type that differs from the first conductive type and formed to be arranged in the first region;   a plurality of third regions having the first conductive type and formed in the second regions;   an electrode forming a channel between the first region and the third region; and   a plurality of extended second regions having the second conductive type, arranged in the first region such as to individually include one of the second regions and having an impurity density that is lower than an impunity density of the second regions.   
   
   
       2 . The semiconductor device according to  claim 1 , wherein
 an oxide film is formed between the second regions and isolates adjacent second regions; and   the electrode is provided from the third region formed in one of adjacent second regions to the third region formed in other of the adjacent second regions, with the oxide film therebetween.   
   
   
       3 . The semiconductor device according to  claim 1 , wherein each of a plurality of the electrodes corresponds with each of the third regions and is formed only near each of the third regions. 
   
   
       4 . A semiconductor device comprising:
 a first region having one face provided adjacently to a drain electrode;   a plurality of gate electrodes formed discretely with each other;   a source electrode covering the gate electrodes;   a second region having one face provided adjacently to the gate electrode and the source electrode; and   an extended second region formed between other face of the first region and other face of the second region and having an impunity density that is lower than an impunity density of the second region.   
   
   
       5 . The semiconductor device according to  claim 4 , wherein:
 an end part of the gate electrode is provided adjacently to the one face of the second region, a central portion of the gate electrode is provided adjacently to the extended second region, a gate length of the gate electrode is longer than an gate interval between the gate electrodes, and the gate electrode is formed in a plate-like shape and is covered with an oxide film;   a thickness of the extended second region is set such that an inversion region that inverts from the second conductive type to the first conductive type is generated in the extended second region when a voltage below a threshold voltage is applied;   the second region is formed on other face of the extended second region, and a thickness of the second region is thinner than the thickness of the extended second region.   
   
   
       6 . The semiconductor device according to  claim 4 , further comprising a fourth region formed immediately below the gate electrode and having an impunity density that is lower than the impunity density of the extended second region. 
   
   
       7 . The semiconductor device according to  claim 4 , further comprising a fifth region formed between the gate electrode and the extended second region.

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