Recess Etch for Epitaxial SiGe

Abstract

A PMOS transistor and a method for fabricating a PMOS transistor. The method may include providing a semiconductor wafer having a PMOS transistor gate stack, source/drain extension regions, and active regions. The method may also include forming epi sidewalls, performing a ex-situ recess etch, and performing an in-situ recess etch. The ex-situ recess etch and the in-situ recess etch form recessed active regions. The PMOS transistor is formed by a method using ex-situ and in-situ etch and has epitaxial SiGe regions with a greatest width at the surface of the semiconductor wafer.

1 . A PMOS transistor produced by the method, comprising;
 providing said semiconductor wafer having a PMOS transistor gate stack, source/drain extension regions, and active regions;   performing a ex-situ recess etch of said active regions; and   performing an in-situ recess etch of said active regions;   wherein said ex-situ recess etch and said in-situ recess etch form a recessed active region.   
   
   
       2 . A PMOS transistor, comprising:
 a semiconductor wafer;   a PMOS transistor gate stack coupled to said semiconductor wafer;   epi sidewalls coupled to said PMOS transistor gate stack;   source/drain extension regions formed within said semiconductor wafer;   source/drain sidewalls coupled to said epi sidewalls;   source/drain regions formed within said semiconductor wafer; and   epitaxial SiGe formed within said semiconductor wafer and coupled to a surface of said semiconductor wafer, said epitaxial SiGe having its greatest width at said surface of said semiconductor wafer.   
   
   
       3 . The PMOS transistor of  claim 2  wherein a cross-section of said epitaxial SiGe is isosceles trapezoid-shaped. 
   
   
       4 . The PMOS transistor of  claim 2  wherein a cross-section of said epitaxial SiGe is funnel-shaped. 
   
   
       5 . The PMOS transistor of  claim 2  wherein said epitaxial SiGe contains carbon.