Butterfly network for permutation or de-permutation utilized by channel algorithm

Abstract

A butterfly network for channel coding permutation and de-permutation. The butterfly network may include a first side and a second side, wherein each of the first side and second side has at least one terminal and two or more columns of nodes located between the first and second sides, wherein a first column of the columns may interface the first side, a second column of the columns may interface the second side and each of the columns comprises at least one node, wherein each node of the columns may be connected to a first number of nodes in each of adjacent columns next to the columns, and said first number may be identical for all the nodes in the network, and wherein the nodes which may be selected as switches are concurrently controlled to perform switching operations.

1 . A butterfly network for channel coding permutation and de-permutation, the butterfly network comprising:
 a first side and a second side, wherein each of the first side and second side has at least one terminal; and   two or more columns of nodes located between the first and second sides, wherein a first column of the columns interfaces the first side, a second column of the columns interfaces the second side and each of the columns comprises at least one node,
 wherein each node of the columns is connected to a first number of nodes in each of adjacent columns next to the columns, and said first number is identical for all the nodes in the network, and 
 wherein the nodes which are selected as switches are concurrently controlled to perform switching operations. 
   
   
   
       2 . The butterfly network of  claim 1 , wherein each of the columns comprises a second number of nodes and the second number is identical for each of the columns. 
   
   
       3 . The butterfly network of  claim 1 , wherein the terminals of the first side and second side have an exclusive node in the first column and second column, respectively, and each of the terminals is connected to each of the exclusive nodes. 
   
   
       4 . The butterfly network of  claim 1 , wherein a terminal of the terminals of the first side is combined with another terminal of the first side, and a terminal of the terminals of the second side is combined with another terminal of the second side. 
   
   
       5 . The butterfly network of  claim 1 , wherein a node of the nodes in a column of the columns is combined with another node in the same column. 
   
   
       6 . The butterfly network of  claim 4 , wherein the connections between the nodes and the terminals are combined to form a single connection, if the connections overlap and are identical. 
   
   
       7 . The butterfly network of  claim 5 , wherein the connections between the nodes are combined to form a single connection, if said connections overlap and are identical. 
   
   
       8 . The butterfly network of  claim 1 , wherein the nodes which are selected as switches are nodes of the first column, if a predetermined direction of data flow through the network is from the first side to the second side. 
   
   
       9 . The butterfly network of  claim 1 , wherein the terminals of the first side or the second side are intra-block permuters and the terminals of the other side are memory buffers, wherein the other side of the first side is the second side and vise versa. 
   
   
       10 . The butterfly network of  claim 1 , wherein the terminals of the first side or the second side are a posteriori probability (APP) decoders and the terminals of the other side are memory buffers, wherein the other side of the first side is the second side and vise versa. 
   
   
       11 . A butterfly network for channel coding permutation and de-permutation, the butterfly network comprising:
 a first side and a second side, wherein each of the first side and second side has at least one terminal; and   two or more columns of nodes located between the first and second sides, wherein a first column of the columns interfaces the first side, a second column of the columns interfaces the second side and each of the columns comprises at least one node,
 wherein each node of one of the columns is connected to at least one node of an adjacent column next to the one of the columns, and 
 wherein the nodes which are selected as switches are concurrently controlled to perform switching operations. 
   
   
   
       12 . The butterfly network of  claim 11 , wherein the terminals of the first side and second side have an exclusive node in the first column and second column, respectively, and each of the terminals is connected to each of the exclusive nodes. 
   
   
       13 . The butterfly network of  claim 11 , wherein a terminal of the terminals of the first side is combined with another terminal of the first side, and a terminal of the terminals of the second side is combined with another terminal of the second side. 
   
   
       14 . The butterfly network of  claim 11 , wherein a node of the nodes in a column of the columns is combined with another node in the same column. 
   
   
       15 . The butterfly network of  claim 14 , wherein the connections between the nodes and the terminals are combined to form a single connection, if the connections overlap and are identical. 
   
   
       16 . The butterfly network of  claim 15 , wherein the connections between the nodes are combined to form a single connection, if said connections overlap and are identical. 
   
   
       17 . The butterfly network of  claim 11 , wherein the nodes which are selected as switches are nodes of the first column, if a predetermined direction of data flow through the network is from the first side to the second side. 
   
   
       18 . The butterfly network of  claim 11 , wherein the terminals of the first side or the second side are intra-block permuters and the terminals of the other side are memory buffers,
 wherein the other side of the first side is the second side and vise versa.   
   
   
       19 . The butterfly network of  claim 11 , wherein the terminals of the first side or the second side are a posteriori probability (APP) decoders and the terminals of the other side are memory buffers,
 wherein the other side of the first side is the second side and vise versa.