US2009167363A1PendingUtilityA1

Reduction of signal skew

Assignee: ST MICROELECTRONICS PVT LTDPriority: Dec 26, 2007Filed: Dec 31, 2008Published: Jul 2, 2009
Est. expiryDec 26, 2027(~1.4 yrs left)· nominal 20-yr term from priority
H03K 5/04
44
PatentIndex Score
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Cited by
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0
Claims

Abstract

Skew is reduced by extracting the AC component of an input signal and superimposing it on a common reference voltage to produce a resulting voltage. The resulting voltage is provided as an input to a comparator, which compares it to the reference voltage to provide a final output. Thus, all signals fed to a system, in accordance with an embodiment, are referenced at the same DC level and hence, skew is reduced.

Claims

exact text as granted — not AI-modified
1 . A system for reduction of signal skew comprising:
 an extraction module for extracting the AC component of an input signal;   a superimposing module coupled to the extraction module for superimposing the extracted AC component of the input signal on a common reference voltage to produce a resulting signal; and   a comparator module coupled to the superimposing module for comparing the resulting signal with the reference voltage to give a final output.   
   
   
       2 . A system as claimed in  claim 1 , wherein the extracting module comprises a capacitor for blocking a DC component of the input signal. 
   
   
       3 . A system as claimed in  claim 1  wherein the superimposing module comprises a summing amplifier for superimposing the extracted AC component of the signal 
   
   
       4 . A skew reduction device comprising:
 an extraction module for extracting an AC component of an input signal;   a superimposing module coupled to the extraction module for superimposing the extracted AC component of the input signal on a common reference voltage to produce a resulting signal; and   a comparator module coupled to the superimposing module for comparing the resulting signal with the reference voltage to give a final output.   
   
   
       5 . A skew reduction device as claimed in  claim 4 , wherein the extracting module comprises a capacitor for blocking a DC component of the input signal. 
   
   
       6 . A skew reduction device as claimed in  claim 4  wherein the superimposing module comprises a summing amplifier for superimposing the extracted AC component of the signal. 
   
   
       7 . A DDR/SSTL memory interface comprising:
 a. a transmission unit;   b. an interconnect unit;   c. a receiver unit coupled to the transmission unit through said interconnect unit;   d. a skew reduction unit coupled to output of the receiver unit comprising:
 i. an extraction module for extracting an AC component of an input signal; 
 ii. a superimposing module coupled to the extraction module for superimposing the extracted AC component of the input signal on a common reference voltage to produce a resulting signal; and 
 iii. a comparator module coupled to the superimposing module for comparing the resulting signal with the reference voltage to give a final output. 
   
   
   
       8 . A DDR/SSTL memory interface as claimed in  claim 7 , wherein the extracting module comprises a capacitor for blocking a DC component of the input signal. 
   
   
       9 . A DDR/SSTL memory interface as claimed in  claim 7  wherein the superimposing module comprises a summing amplifier for superimposing the extracted AC component of the signal. 
   
   
       10 . A method for reduction of skew in memory interfaces comprising:
 a. extracting the AC component of an input signal;   b. superimposing the extracted AC component on a common reference voltage to produce a resulting signal; and   c. comparing the resulting signal with the reference voltage to give a final output.   
   
   
       11 . A method as claimed in  claim 10  wherein extracting the AC component of an input signal comprises blocking a DC component of the input signal by a capacitor.

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